984fda4d7d
Add initial dsi display nodes for Kera. Change-Id: I09194c34f8ac1ec6d606879267b1732a72c0cd4e Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com> Signed-off-by: lnxdisplay <lnxdisplay@localhost>
150 lines
3.9 KiB
Plaintext
150 lines
3.9 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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&soc {
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mdss_mdp: qcom,mdss_mdp@ae00000 {
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};
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mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 {
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compatible = "qcom,dsi-ctrl-hw-v2.9";
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label = "dsi-ctrl-0";
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cell-index = <0>;
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frame-threshold-time-us = <800>;
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reg = <0xae94000 0x1000>,
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<0xaf0f000 0x4>,
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<0x0ae36000 0x300>;
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reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
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interrupt-parent = <&mdss_mdp>;
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interrupts = <4 0>;
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qcom,ctrl-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,ctrl-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vdda-1p2";
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qcom,supply-min-voltage = <1200000>;
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qcom,supply-max-voltage = <1320000>;
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qcom,supply-enable-load = <16600>;
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qcom,supply-disable-load = <0>;
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};
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};
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};
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mdss_dsi1: qcom,mdss_dsi_ctrl1@ae96000 {
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compatible = "qcom,dsi-ctrl-hw-v2.9";
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label = "dsi-ctrl-1";
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cell-index = <1>;
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frame-threshold-time-us = <800>;
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reg = <0xae96000 0x1000>,
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<0xaf0f000 0x4>,
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<0x0ae37000 0x300>;
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reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
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interrupt-parent = <&mdss_mdp>;
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interrupts = <5 0>;
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qcom,ctrl-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,ctrl-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vdda-1p2";
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qcom,supply-min-voltage = <1200000>;
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qcom,supply-max-voltage = <1320000>;
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qcom,supply-enable-load = <16600>;
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qcom,supply-disable-load = <0>;
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};
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};
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};
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mdss_dsi_phy0: qcom,mdss_dsi_phy0@ae95500 {
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compatible = "qcom,dsi-phy-v5.2";
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label = "dsi-phy-0";
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cell-index = <0>;
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#clock-cells = <1>;
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reg = <0xae95000 0xa00>,
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<0xae95500 0x400>,
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<0xae94200 0xa0>;
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reg-names = "dsi_phy", "pll_base", "dyn_refresh_base";
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pll-label = "dsi_pll_4nm";
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qcom,platform-strength-ctrl = [55 03
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55 03
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55 03
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55 03
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55 00];
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qcom,platform-lane-config = [00 00 0a 0a
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00 00 0a 0a
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00 00 0a 0a
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00 00 0a 0a
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00 00 8a 8a];
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qcom,platform-regulator-settings = [1d 1d 1d 1d 1d];
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qcom,phy-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,phy-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vdda-0p9";
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qcom,supply-min-voltage = <880000>;
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qcom,supply-max-voltage = <950000>;
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qcom,supply-enable-load = <98000>;
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qcom,supply-disable-load = <96>;
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};
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};
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};
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mdss_dsi_phy1: qcom,mdss_dsi_phy1@ae97500 {
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compatible = "qcom,dsi-phy-v5.2";
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label = "dsi-phy-1";
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cell-index = <1>;
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#clock-cells = <1>;
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reg = <0xae97000 0xa00>,
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<0xae97500 0x400>,
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<0xae96200 0xa0>;
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reg-names = "dsi_phy", "pll_base", "dyn_refresh_base";
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pll-label = "dsi_pll_4nm";
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qcom,platform-strength-ctrl = [55 03
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55 03
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55 03
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55 03
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55 00];
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qcom,platform-regulator-settings = [1d 1d 1d 1d 1d];
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qcom,platform-lane-config = [00 00 0a 0a
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00 00 0a 0a
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00 00 0a 0a
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00 00 0a 0a
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00 00 8a 8a];
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qcom,phy-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,phy-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vdda-0p9";
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qcom,supply-min-voltage = <880000>;
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qcom,supply-max-voltage = <950000>;
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qcom,supply-enable-load = <98000>;
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qcom,supply-disable-load = <96>;
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};
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};
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};
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dsi_pll_codes_data:dsi_pll_codes {
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reg = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
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0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
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0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
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0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
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0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
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0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
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0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
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0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
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label = "dsi_pll_codes";
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};
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};
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