8a8c40f33a
Remove coherent proeprty for fastrpc smmu context banks in monaco target. Monaco target doesn't support IO coherency hence coherent property is not applicable for monaco. Change-Id: I9d1f46825b264c48dc519cf6be3cb1edb6241d70 Signed-off-by: Abhinav Parihar <quic_parihar@quicinc.com>
60 lines
1.6 KiB
Plaintext
60 lines
1.6 KiB
Plaintext
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&glink_edge {
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qcom,fastrpc {
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compatible = "qcom,fastrpc";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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label = "adsp";
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memory-region = <&adsp_mem>;
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qcom,vmids = <22 37>;
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compute-cb@1 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <3>;
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iommus = <&apps_smmu 0x01C3 0x0>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable";
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pd-type = <1>; /* ROOT_PD */
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};
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compute-cb@2 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <4>;
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iommus = <&apps_smmu 0x01C4 0x0>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable";
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qcom,nsessions = <5>;
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pd-type = <3>; /* SENSORS_STATICPD */
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};
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compute-cb@3 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <5>;
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iommus = <&apps_smmu 0x01C5 0x0>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable";
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pd-type = <2>; /* AUDIO_STATICPD */
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};
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compute-cb@4 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <6>;
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iommus = <&apps_smmu 0x01C6 0x0>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable";
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pd-type = <7>; /* USERPD */
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};
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compute-cb@5 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <7>;
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iommus = <&apps_smmu 0x01C7 0x0>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable";
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pd-type = <7>; /* USERPD */
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};
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};
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}; |