/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

&glink_edge {
	qcom,fastrpc {
		compatible = "qcom,fastrpc";
		qcom,glink-channels = "fastrpcglink-apps-dsp";
		qcom,intents = <0x64 64>;
		label = "adsp";
		memory-region = <&adsp_mem>;
		qcom,vmids = <22 37>;

		compute-cb@1 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <3>;
			iommus = <&apps_smmu 0x01C3 0x0>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable";
			pd-type = <1>;	/* ROOT_PD */
		};

		compute-cb@2 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <4>;
			iommus = <&apps_smmu 0x01C4 0x0>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable";
			qcom,nsessions = <5>;
			pd-type = <3>;	/* SENSORS_STATICPD */
		};

		compute-cb@3 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <5>;
			iommus = <&apps_smmu 0x01C5 0x0>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable";
			pd-type = <2>;	/* AUDIO_STATICPD */
		};

		compute-cb@4 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <6>;
			iommus = <&apps_smmu 0x01C6 0x0>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable";
			pd-type = <7>;	/* USERPD */
		};

		compute-cb@5 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <7>;
			iommus = <&apps_smmu 0x01C7 0x0>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable";
			pd-type = <7>;	/* USERPD */
		};
	};
};