Commit Graph

22 Commits

Author SHA1 Message Date
Uttkarsh Aggarwal
b1860f49b1 ARM: dts: msm: add qcom,pm-qos-latency for sun
It will help for USB KPI.

Change-Id: I4b4ba5cc7aca95952a91bbd21f5d1cc2ab020ca2
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
2025-02-24 14:18:39 +05:30
Ke Du
ac218ced98 ARM: dts: msm: Add dependency of iommu node on USB driver
Currently, wait_for_device_probe api added before dwc3_probe
is called in core_init which is suppose to ensure that in case
the child is getting teared down, the userspace doesn't get to
write UDC and do gadget_start.

However, wait_for_device_probe api makes sure that the driver wait
until all probes are completed. Ideally, it wouldn't be a problem
but in cases of other driver's probe fails, usb would be affected
here even though usb isn't at fault.

Fix this by making a dummy-dependency on smmu node since the original
intention of the patch was to make sure if smmu driver was probed
successfully, then only proceed for child driver's probe.

Change-Id: Id05797f8dcd26783e3c0eab4facf4f4672790fe6
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
Signed-off-by: Ke Du <quic_kedu@quicinc.com>
2024-06-06 05:07:24 -07:00
qctecmdr
30cdea87be Merge "ARM: dts: msm: Update config values for QMP PHY" 2024-05-07 17:20:49 -07:00
Ronak Vijay Raheja
5f420d6e70 ARM: dts: msm: Update config values for QMP PHY
Update values for QMP PHY configs based on latest HSR settings.

Change-Id: Ia387ca27e0663aacb6dc7a3817a4bdd097d3ea01
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2024-04-30 12:37:36 -07:00
Wesley Cheng
9126253e9c ARM: dts: msm: Define maximum number of USB XHCI interrupters
DWC3 host and XHCI plat now communicates the maximum number of interrupters
the XHCI HCD will allocate.  Since platforms only require a limited number
of interrupters (i.e. 3) make sure XHCI doesn't allocate more than is
required.

Change-Id: I33471627bb03087dc7b509cd9dd13ef19c840c04
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
2024-04-26 15:40:43 -07:00
Ronak Vijay Raheja
78d7547e4a ARM: dts: msm: Add register entry to ssusb in sun
Adding a 4-byte register entry for tcsr_dyn-en-dis to enable/disable USB
dynamically from dwc3-msm-core.

Change-Id: If9c2aa8f91c4067483e0e917ca7e84d4a6894cd5
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2024-04-02 11:41:19 -07:00
Wesley Cheng
be60d48e81 ARM: dts: msm: Fix IOMMU address reserve definition
In order to ensure that IOMMU returns a 32 bit address, extend the
address and size cells to 2, in order to define a region that will
block 0xf0000000--0xffffffffffffffff.  By increasing the address and
size cells for the parent node, the DWC3 child node has to also
change the 'reg' entry to accommodate the added values.

Change-Id: Iaa413f0c3ac7100afea9a6d8e020bdb795866501
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
2024-03-25 12:52:13 -07:00
Ronak Vijay Raheja
29471c0db8 ARM: dts: msm: Fix config values for QMP PHY
Fix values for QMP PHY configs according to updates from Hardware
Settings team which allow resolving Host mode enumeration issues for
SuperSpeed devices.

Change-Id: I4ad0ff3df8b8b8588679e93135aaac72c537015c
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2024-02-08 14:24:35 -08:00
Ronak Vijay Raheja
77314aed5c ARM: dts: msm: Use "iommu-addresses" property for sun
Use upstream compatible device smmu address space DT property
"iommu-addresses" in accordance to FR92369. Replace existing use of
"qcom,iommu-dma-addr-pool" with "iommu-addresses" for dwc3 node in usb0
for describing to the DMA API what IOVA addresses dwc3 cannot use.

Change-Id: Ia18d064649fb86e809023dbd61262c0e026acf73
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2024-02-08 14:20:21 -08:00
Elson Roy Serrao
e8b1f503b7 ARM: dts: msm: Add interconnect node to sun
Add interconnect node to sun for scaling the bus vote.

Change-Id: Id121b406335a3a3cb388827416aeaec8a076315c
Signed-off-by: Elson Roy Serrao <quic_eserrao@quicinc.com>
2023-12-19 15:48:51 -08:00
Wesley Cheng
0ace409a0c ARM: dts: msm: Add USB QMI SND node for sun
Enable the USB SND device node, which carries some information about the
parameters passed to the audio DSP.

Change-Id: I2f0176130a6b8c3987f5bf8d5165cfd0298ad337
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
2023-12-14 12:22:19 -08:00
Elson Roy Serrao
bec108c2c3 ARM: dts: msm: Add eud extcon node to sun
Add eud extcon node to sun to enable eud extcon notifications.

Change-Id: I40055adc80dd7d5e3b661b5f19bb3e4190795854
Signed-off-by: Elson Roy Serrao <quic_eserrao@quicinc.com>
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
2023-11-29 15:56:58 -08:00
qctecmdr
d657252e1a Merge "ARM: dts: msm: Vote for VDD parent regulator" 2023-11-23 05:57:35 -08:00
Elson Roy Serrao
b82ab7f190 ARM: dts: msm: Add PHY irqs to sun
Add SS phy and HS phy related irqs to sun.

Change-Id: I8f5ae4d8a11434141deb429621225448aac76786
Signed-off-by: Elson Roy Serrao <quic_eserrao@quicinc.com>
2023-11-21 18:03:02 -08:00
Wesley Cheng
7e50bd5e36 ARM: dts: msm: Vote for VDD parent regulator
The L1F regulator is a parent for the M31 EUSB2 PHY.  Vote for this
regulator when PHY is resumed, and disable when suspended.

Change-Id: I91d309b5afefc7c9b4205e9e73b3714963d3f45f
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
2023-11-20 16:32:39 -08:00
qctecmdr
7b19544dd2 Merge "ARM: dts: msm: Add GSI registers dt entry to sun" 2023-11-20 11:14:25 -08:00
Elson Roy Serrao
24acbfa509 ARM: dts: msm: Add GSI registers dt entry to sun
Add GSI related registers dt entry to sun to support GSI functions.

Change-Id: I0920fc27e827952d55d87a59b093d945830868d5
Signed-off-by: Elson Roy Serrao <quic_eserrao@quicinc.com>
2023-11-17 12:52:04 -08:00
Wesley Cheng
fcb5465597 ARM: dts: msm: Use proper QMP PHY VDD operating voltage
Current setting votes for 912mV for the QMP PHY vdd rail, which is above
what is recommended from the power grid.  Set the vdd operating voltage to
880mV to match what is suggested, in order to maintain the regulator
numbers expected for the rail.

Change-Id: Iaefd58656c72427933e45000db21f55bc5de979c
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
2023-11-15 17:42:06 -08:00
Ronak Vijay Raheja
1fb24b5e92 ARM: dts: msm: Add M31 HS and QMP SS USB PHY configuration on sun
Add M31 eUSB2 and QMP SS PHY nodes to sun. Add required dependencies in
pinctrl as well for HW based SS lane detection.

Change-Id: Ib1546aa7d92853a88a05d0bbc836ec4caac40960
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2023-11-06 11:14:37 -08:00
Ronak Vijay Raheja
ad851ab8e5 ARM: dts: msm: Add GDSC supply to USB node for sun
Add the USB3_GDSC-supply property to the usb device to vote for GDSC and
avoid it being turned off in sync-state.

Change-Id: I33e88f1f3e2c0843f5a049cc3b22d348d261f3e2
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2023-07-21 16:30:02 -07:00
Ronak Vijay Raheja
6c59e20876 ARM: dts: msm: Enable SMMU for USB on sun
Switch to enable SMMU for the USB controller on sun.

Change-Id: I9b43a167beb2ab971ce48bbc5f03bf62512addc2
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2023-06-30 17:39:46 -07:00
Ronak Vijay Raheja
de8649c8e1 ARM: dts: msm: Add USB device nodes for sun
Enable USB related properties for USB functionality on sun.

Change-Id: Ibb522859494c0e939b46a6b790448fc2e62bd37e
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2023-06-28 18:41:20 -07:00