Add tgu node for ipcb and spmi0/1 on sun.
Change-Id: Ia4468b846f64b8812ac43e4d2aeb31a223dea64f
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Update the reserve gpios for Sun SoC as these
are not going to be used by linux and accessing
them by default can result in XPU fault.
Change-Id: I0c95d3df1f91584a77956f0beffebf1b63141c9f
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Support the memshare device, which requires 6 Mb.
Change-Id: I1d72bdf7cdb895fbe76e49ad3541fa715bddf24d
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Enable the USB SND device node, which carries some information about the
parameters passed to the audio DSP.
Change-Id: I2f0176130a6b8c3987f5bf8d5165cfd0298ad337
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Enable apss cpu ncc0, ncc1 measure nodes to support cluster l, m
clk measure.
Change-Id: Ib691fb4254f41c64639e8f2e36c0d009336576c3
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
Add memshare nodes for client ids 5 and 6 which will be used for the
qmc use case. One of these nodes will allocate memory from a reserved
memory range while the other allocates from system cma.
Change-Id: I9deda5ba526c9d7e44e639fd97ca0825a1de357f
Signed-off-by: Tony Truong <quic_truong@quicinc.com>
Add a dependency between the gh-watchdog and pmic-pon-log devices
for Sun boards. This ensures that during system boot-up, the driver
responsible for the gh-watchdog device initializes before the one
responsible for the pmic-pon-log device.
This behavior is critical to ensuring that a PMIC warm-reset correctly
occurs in the situation that the qcom,pmic-fault-panic property is
specified for the pmic-pon-log device and the previous system
power-off was caused by a PMIC fault.
Change-Id: I8c40b19ce150ca5bb3cb9514c7d293481a5009af
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Update llcc gold bwmon name to correctly distinguish
its base address.
Change-Id: Id8c431e4093894c719731e88cd807b9a30de7559
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Since, we are settle down with 19.2 MHZ for Arch timer frequency
for Sun target, let's do it for VM as well.
Change-Id: I456015fefd6fb7df53cb1d0258e2ee988fd5c88f
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Update disp_rsc device to use correct 0x1000 size instead of 0x10000
for sun.
Change-Id: I81607aaf202ff18032fa117dfbb6f47f4e4ebb40
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Add qcedev crypto support for sun platforms.
Change-Id: Id558a7d0620afa40c8d9b8e43161d8f6ca09e810
Signed-off-by: Daniel Perez-Zoghbi <quic_dperezzo@quicinc.com>
Provide a contiguous region for use by qmc. Unless explicitly
instructed, this region should not be used by external customers.
Change-Id: I98f651c835cf7fa19eba2bc209eb7b7807245877
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
This reverts commit 704e2e0186.
Reason for revert: No longer needed once 1ns frequency is disabled.
Change-Id: I2355fff08acf5746efdce7562df99f83bba4696b
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
EUD node was set to bypass the pdc since the pdc node was unavailable.
Now that it's available, set the interrupt parent to the pdc and adjust
the EUD node accordingly.
Change-Id: I2516315753a3452d66b9cad3e6bdc089bb8dcd6c
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
PMK8550 has a couple of high resolution PWM channels which can support
from 8-bit to 15-bit PWM. Add it.
Change-Id: I277bca101546de07ffc8bb34380fc8bbdea10a92
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
