Change https://lore.kernel.org/all/20230525113034.46880-1-tony@atomide.com
registers serial core controller as a child of msm uart device.
Since child should suspend first, due to the child's auto suspend
delay (SERIAL_PORT_AUTOSUSPEND_DELAY_MS), additional 500msecs
delay is added during msm_geni_serial_runtime_suspend.
Added new dtsi flag 'qcom,suspend-ignore-children', to ignore
dependencies on children by runtime PM framework, this helps to
exit quickly from msm_geni_serial_runtime_suspend and save power.
Change-Id: Icac2f02ad96f45359cf1516284b7a64d2de61a79
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
Configure low power cpu on gold bwmon for sun.
Change-Id: I323797604e76a5e872171ba359ee43cc155235c6
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Added interconnect-names qup-core,qup-config and qup-memory to all qupv3
nodes.
Change-Id: Ida8d2ae3f1d71900f24f977599ea401c5d899e4d
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
Remove wcn6750 and wcn3990 from kernel devicetree, since
it's moved to techpack.
Change-Id: I83569274403a5292a293b95d2cbd76e553ff8ea1
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
Handle voting for the regulator for SPU sensors.
Change-Id: I192731df94cc894cdf6826c69230b0cf9a3e9c3e
Signed-off-by: Nurit Lichtenstein <quic_nuritl@quicinc.com>
Enforce dependency of dma heap driver on SCM driver
without which it will not work and this is in
the preparation of adding interconnect voting
in SCM node which if it gets added without this
change dma heap driver can result in NULL pointer
issue.
Change-Id: I641e2e1c7692dfd52dd1efa75064fbc8f2228fe2
Signed-off-by: Sayali Patil <quic_sayapati@quicinc.com>
CRMV regs have status captured for various commands/voltage levels.
Map CRMV registers in device so that driver can dump when required.
Change-Id: I69558336a81ae3f89140ebaf515528dd15ca66e9
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
Add ufs proxy power supply to add an additional vote
for VCCQ LDO. In case of ufs shutdown, UFS VCCQ LDO would
be turned off by PMIC regulator itself.
Change-Id: If55c56bcbe6a3b76dbe5703095bd5d98abdca8a6
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
Add pinctrl node with compatible "qcom,tuna-tlmm" in order to
enable the Top Level Multiplexer (TLMM) block on Tuna SoC.
Change-Id: I0d493147efd67b73846701cddc31274a006a6a99
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
SPM feature is deprecated from 5.15 kernel. So remove
events specific to SPM feature.
Change-Id: I5b12b0eb89ec6f0dfec775135d05d55258168b91
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
This reverts commit 5deaa15089.
Reason for revert: Possibly fix a TZ crash.
Change-Id: Ia2baa9f25b31fb82fc4ed204872f9d7f85051947
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Add nodes to enable scmi communication to cpucp on parrot.
Update tx and rx regname for cpucp.
Change-Id: I3fa21c0b28d91a5e215334c8013a56b60c8fd18b
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Revert dynamic ATID support for remout etm on sun.
Change-Id: Ife42b58a47b3ac19d367df2837ba5c08f31255f4
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
DWC3 host and XHCI plat now communicates the maximum number of interrupters
the XHCI HCD will allocate. Since platforms only require a limited number
of interrupters (i.e. 3) make sure XHCI doesn't allocate more than is
required.
Change-Id: I33471627bb03087dc7b509cd9dd13ef19c840c04
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Add package ID to msm-IDs for sun hdk SoC to support different
hardware settings and can be configured in their package specific
device trees.
Change-Id: I42180ff794d76a4172e9b51a7f68f38310369306
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Correct the smmu iova-width values for parrot soc
as per SMMU document.
Change-Id: I1ec478cc2238b8e881df14928f53db2a24daf5c6
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Set cpu frequency vote for qos0 and qos1.
Change-Id: Idbbbb4649d3df3e9e2037a64dc4eb5476bc0bf4a
Signed-off-by: kamasali Satyanarayan <quic_kamasali@quicinc.com>
