ARM: dts: msm: Add CRMV regs pcie and camera on pineapple
CRMV regs have status captured for various commands/voltage levels. Map CRMV registers in device so that driver can dump when required. Change-Id: I69558336a81ae3f89140ebaf515528dd15ca66e9 Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com> Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
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@@ -879,8 +879,8 @@
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cam_crm: crm@add7000 {
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label = "cam_crm";
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compatible = "qcom,cam-crm";
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reg = <0xadd7000 0x2000>, <0xadd9800 0x800>, <0xadda000 0x2000>;
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reg-names = "base", "crm_b", "crm_c";
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reg = <0xadd7000 0x2000>, <0xadd9800 0x800>, <0xadda000 0x2000>, <0xadd9000 0x800>;
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reg-names = "base", "crm_b", "crm_c", "crm_v";
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interrupts = <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "cam_crm";
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clocks = <&camcc CAM_CC_DRV_AHB_CLK>;
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@@ -891,8 +891,8 @@
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pcie_crm: crm@1d01000 {
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label = "pcie_crm";
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compatible = "qcom,pcie-crm";
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reg = <0x1d01000 0x3000>, <0x1d04800 0x800>, <0x1d05000 0x2000>;
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reg-names = "base", "crm_b", "crm_c";
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reg = <0x1d01000 0x3000>, <0x1d04800 0x800>, <0x1d05000 0x2000>, <0x1d04000 0x800>;
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reg-names = "base", "crm_b", "crm_c", "crm_v";
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interrupts = <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "pcie_crm";
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clocks = <&pcie_0_pipe_clk>;
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