Commit Graph

437 Commits

Author SHA1 Message Date
qctecmdr
aeb391b14e Merge "ARM: dts: msm: Add qcom_cpuss_sleep_stats_v4 device for sun" 2024-04-05 08:33:37 -07:00
Minghao Zhang
44e4da3d63 ARM: dts: msm: Add qcom_cpuss_sleep_stats_v4 device for sun
This change add qcom_cpuss_sleep_stats_v4 device.

Change-Id: Iaf226999b468090d4c5af542713a61144caa552b
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
2024-04-05 01:26:46 -07:00
Mukesh Ojha
70d5c7312d ARM: dts: msm: Add Sun qfprom compat string
Add the soc-specific compatible string for qfprom to
support keepout regions on Sun SoC.

Change-Id: I676acc8110d05dd7d9d7fef0455b5152f3afc4ac
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-04-04 22:49:51 -07:00
Prudhvi Yarlagadda
ae20d53944 Revert "ARM: dts: msm: Mark GCC clock node as GenPD provider"
This reverts commit c0a6035e47.

Facing issue where PCIe PHY GDSC is getting turned off when system
suspend is happening. So reverting this change till we find a fix.

Change-Id: Ic4bb32c126e0247688d31e276a9a3f29c373b167
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
2024-04-04 16:56:08 -07:00
Gokul krishna Krishnakumar
f61dcd79f6 ARM: dts: qcom: change the power regulator to VDD_MX
SOCCP uses mx and cx power rails and not the island rails.

Change-Id: I52f3f28f9206e62b4b7dc99dd4c7c9f19d6f92cf
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-04-02 10:10:47 -07:00
Gokul krishna Krishnakumar
80c3e1d96b ARM: dts: qcom: change the power regulator to LowSVS
SOCCP requires only LOWSVS power level for the regulators.

Change-Id: I940304eacd9d4e039d65b42866daf69aaae75b85
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-04-02 10:10:15 -07:00
Jagadeesh Kona
49f746bf1e ARM: dts: msm: Mark gpucc clock node as GenPD provider
Mark gpucc clock node as GenPD provider and disable the
graphics GDSC regulator nodes. While at it, update gxclkctl
node to add support for gx_clkctl_gx_gdsc power domain.

Change-Id: I0d4c84da2e3aadd7e1a901d6a9e26c7d4ad1a3c1
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
2024-04-01 15:08:14 +05:30
Pratyush Brahma
b552d881b3 ARM: dts: qcom: Enable mem-offline to send AOP cmd
Currently, the mechanism to send AOP cmd to offline memblocks is
disabled. Enable the mechanism to achieve desired power savings.

Change-Id: I68a25c34801d020c901ddc7d3e27099a22e88f01
Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
2024-03-29 14:31:58 +05:30
qctecmdr
7bb9f0af25 Merge "ARM: dts: msm: Drop redundant signal-aop property for both pineapple/Sun" 2024-03-28 10:45:30 -07:00
Huang Yiwei
eaef3d951e ARM: dts: msm: Remove system health monitor node
Since system health monitor has been moved to user space, this commit
removes its node from device tree.

Change-Id: I87f180c01d0e0a594b924f01722156c2a08ca086
Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
2024-03-28 13:54:32 +08:00
qctecmdr
eda1c7e1f0 Merge "ARM: dts: msm: gunyah: Move irq lend qtimer to frame 5 for sun" 2024-03-27 20:46:09 -07:00
Po-Jung Lai
76e16772ae ARM: dts: msm: gunyah: Move irq lend qtimer to frame 5 for sun
As Frame 2 was assigned to TZ for secure world timer, moving
IRQ lend test qtimer from frame 2 view 1 to frame 5.

Change-Id: I855b881f12b970c56bf595fffcc57ffadf184a58
Signed-off-by: Po-Jung Lai <quic_pojulai@quicinc.com>
2024-03-27 17:00:24 -07:00
qctecmdr
6050629f49 Merge "ARM: dts: msm: Add MPAM node" 2024-03-27 16:24:29 -07:00
qctecmdr
e2066f38dc Merge "ARM: dts: msm: Mark GCC clock node as GenPD provider" 2024-03-27 13:57:44 -07:00
Huang Yiwei
90b0373e8c ARM: dts: msm: Add MPAM node
Add MPAM device node to enable MPAM.

Change-Id: I01b18f3c5f266eb18e21df849aff24389126876a
Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
2024-03-27 22:38:32 +08:00
qctecmdr
b3e70e4cbd Merge "ARM: dts: msm: Add wakeup-source property to virtio-vsock" 2024-03-26 22:32:33 -07:00
qctecmdr
6551f93dd2 Merge "ARM: dts: qcom: Add child node for TLMM device" 2024-03-22 14:50:15 -07:00
Mukesh Ojha
04f005dbd8 ARM: dts: msm: Drop redundant signal-aop property for both pineapple/Sun
signal-aop is an redundant property and is not being used in pas
driver and used only in qcom_spss driver however, it is an redundant
property. Drop this property and let qcom_spss manage does necessary
change to live without it.

Change-Id: If7016f281c753a38f9f1c4b35238de5a96db4c89
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-03-22 23:41:09 +05:30
qctecmdr
45fd77651d Merge "ARM: dts: qcom: Add pong to the list of soccp interrupts" 2024-03-21 15:18:31 -07:00
qctecmdr
d8764e49fd Merge "ARM: dts: msm: Add PDP mailbox and logging nodes for sun" 2024-03-21 09:44:33 -07:00
Gokul krishna Krishnakumar
13045992eb ARM: dts: qcom: Add pong to the list of soccp interrupts
Add an extra bit in the SOCCP SMP2P to check if the soccp is alive.

Change-Id: I9c34498a877dfe80a20ec25e182daec531f32307
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-03-20 16:37:14 -07:00
Cong Zhang
7c9208147f ARM: dts: qcom: Add child node for TLMM device
TLMM driver can now support multi-VMs. Update a new child node to give
GPIO access for TUIVM.

Change-Id: Ic1f1cca908dbdc65c248d1f637eaaa9fcfddf00a
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
2024-03-19 04:43:12 -07:00
Jingyi Wang
972b927dba ARM: dts: msm: Enable virtio-vsock device for sun-vm
Add shared memory to enable virtio-vsock device for sun-vm.

Change-Id: I188849af908df77b0d78b03ce8461fcd309650f4
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
2024-03-19 15:35:47 +08:00
Chris Lew
23baa335a2 ARM: dts: msm: Add nodes for IMS glink communication
Add memshare and glinkpkt nodes to enable the IMS usecase.

Change-Id: Ic2a3a69eb2c77634203b0e42d7181f64a299b177
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
2024-03-14 15:26:23 -07:00
qctecmdr
25f2af01c7 Merge "ARM: dts: msm: Mark videocc clock node as GenPD provider" 2024-03-13 22:54:53 -07:00
qctecmdr
f4d60f0352 Merge "ARM: dts: msm: Add display CRM SW client for Sun" 2024-03-13 18:27:30 -07:00
qctecmdr
e9fe5fd5c2 Merge "ARM: dts: qcom: Added eSE Secure GPIO as reserved" 2024-03-13 03:41:28 -07:00
PRANAY BHARGAV BHAVARAJU
a0eb78d312 ARM: dts: qcom: Added eSE Secure GPIO as reserved
Enforcing access restrictions for eSE secure GPIO
by tagging it as reserved.

Change-Id: Ia525cafe06689708d323ddbc6b65f9ddc4b4647a
Signed-off-by: PRANAY BHARGAV BHAVARAJU <quic_pbhavara@quicinc.com>
2024-03-13 10:35:48 +05:30
Priyansh Jain
d17872c915 ARM: dts: qcom: Add GPU scan dump skip cooling device support for sun
Add GPU scan dump skip cooling device support for sun.
Add skin mitigation rule for gpu scan dump skip cooling device as
per recommendation.

Change-Id: I1a3c5de6f37ce064d8b74c36297c93a0f31db01d
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
2024-03-12 20:40:33 -07:00
qctecmdr
3a35215b56 Merge "ARM: dts: msm: Disable creation of psi cgroups" 2024-03-12 18:03:09 -07:00
qctecmdr
b136cb95a8 Merge "ARM: dts: msm: Update memory command line paramenters" 2024-03-12 16:03:09 -07:00
qctecmdr
6955597667 Merge "ARM: dts: msm: Increase system cma size for sun" 2024-03-12 01:44:25 -07:00
qctecmdr
a16ef65ef1 Merge "ARM: dts: qcom: SOCCP wdog INT is EDGE triggered HIGH" 2024-03-11 19:08:29 -07:00
Patrick Daly
b089ba2f99 ARM: dts: msm: Disable creation of psi cgroups
Although this is already present in CONFIG_CMDLINE in gki_defconfig, it
appears to be being overridden by the commandline specified in devicetree.

Change-Id: If61b4cfd11a15a7c36fb01875b7c77ac7c5bde8b
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-03-11 17:50:03 -07:00
Patrick Daly
d9c346be79 ARM: dts: msm: Update memory command line paramenters
Setting dma32_disable causes all memory to be placed in ZONE_NORMAL,
and reduces overhead in page allocation.

Change-Id: I770fe2688081b457a121afd23d6d924423680e5f
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-03-11 17:46:49 -07:00
Patrick Daly
2cd1424101 ARM: dts: msm: Increase system cma size for sun
Add 4.5 MB for use by minidump_memory driver.
Add 2 MB for use by memshare IMS usecase.

Change-Id: I5f3897e24dd4b7a1c7bd3f883c4837eaa3ca384a
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-03-11 17:44:03 -07:00
Gokul krishna Krishnakumar
911086ca2e ARM: dts: qcom: SOCCP wdog INT is EDGE triggered HIGH
Fix the interrupt line for wdog INT to EDGE triggered.

Change-Id: Id9ca3f3a632b95bfa17cedacda0936845413ded1
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-03-11 15:32:14 -07:00
Mukesh Ojha
aa1ca3fb0b ARM: dts: msm: Enable qcom,ramoops device
qcom,ramoops driver takes memory dynamically
available from a given range and give it to
ramoops for its usage.

Change-Id: I94ece0f9d25719e240ecb5c7f47a3b1fe83fbab1
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-03-11 11:08:53 -07:00
qctecmdr
89b1f712d0 Merge "ARM: dts: msm: Increase TA memory from 16MB to 20 MB" 2024-03-11 03:10:27 -07:00
Akhil Budampati
0abea575a1 ARM: dts: msm: Increase TA memory from 16MB to 20 MB
Loadable section memory of FingerPrint(FP) Sensor TA
has to be increased which requires increase in qseecom_ta mem.

Change-Id: Ie0a31662cd7b05f3aff0a41c275089ed7684d8b0
Signed-off-by: Akhil Budampati <quic_abudampa@quicinc.com>
2024-03-10 23:27:26 -07:00
Magesh M
c41d01f245 ARM: dts: qcom: Revert SP-PBL related register from sun dtsi
Removed SP PBL Patch Version Register from sun dtsi
since it is no longer used.

Change-Id: I52b28ed1a07676188a39c09b72c0e2364cfc0ac2
Signed-off-by: Magesh M <quic_murugan@quicinc.com>
2024-03-07 12:44:16 -08:00
Amir Vajid
38729f5369 ARM: dts: msm: Add PDP mailbox and logging nodes for sun
Add device nodes to configure PDP mailbox and add support
for PDP logging on both PDP cores.

Change-Id: I2393334d33373df3447f5140cc66cd7624faf0cd
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2024-03-06 09:44:26 -08:00
Jagadeesh Kona
c0a6035e47 ARM: dts: msm: Mark GCC clock node as GenPD provider
Mark GCC clock node as GenPD provider and disable the
PCIE GDSC regulator nodes.

Change-Id: I98fc6709592c393259da77443d4b6e580e61a0b8
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
2024-02-29 16:42:16 +05:30
Jagadeesh Kona
733bef4648 ARM: dts: msm: Mark dispcc clock node as GenPD provider
Mark dispcc clock node as GenPD provider and disable the
display GDSC regulator nodes.

Change-Id: I91cf788254ca0bd78a02dc4b196745da380fb74b
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
2024-02-29 02:28:18 -08:00
Jagadeesh Kona
b10f0ee315 ARM: dts: msm: Mark videocc clock node as GenPD provider
Mark videocc clock node as GenPD provider and disable the
video GDSC regulator nodes.

Change-Id: I206ad77302fa8ece5b4efe28e20d8c1c23d9fac7
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
2024-02-29 02:22:59 -08:00
qctecmdr
7186d56558 Merge "ARM: dts: qcom: use property “iommu-addresses” for SDC2" 2024-02-26 13:35:10 -08:00
qctecmdr
6f231e832d Merge "ARM: dts: msm: Add cpufreq_thermal device for Sun" 2024-02-23 19:06:20 -08:00
qctecmdr
ec26fa8460 Merge "ARM: dts: msm: Remove ufs bus voting entries" 2024-02-23 02:50:34 -08:00
qctecmdr
9d4a54d341 Merge "ARM: dts: qcom: use property “iommu-addresses” for UFSHC" 2024-02-22 13:42:34 -08:00
qctecmdr
f32579f132 Merge "ARM: dts: msm: Enable ftrace in minidump for Sun/Pineapple" 2024-02-22 13:42:34 -08:00