Commit Graph

18 Commits

Author SHA1 Message Date
QCTECMDR Service
7ac8da066e Merge "ARM: dts: msm: monaco: Add qrng compatible" 2024-07-01 03:52:57 -07:00
QCTECMDR Service
e53aeec456 Merge "ARM: dts: msm: monaco: Add qseecom compatible" 2024-07-01 01:45:23 -07:00
QCTECMDR Service
644f39c9bc Merge "ARM: dts: msm: add aon-custom-data glink node" 2024-06-27 15:28:37 -07:00
Shivangi Kesharwani
68f23d29a8 ARM: dts: msm: monaco: Add qrng compatible
Add dt support for qrng for Monaco SOC.

Signed-off-by: Shivangi Kesharwani <quic_skesharw@quicinc.com>
2024-06-27 16:05:31 +05:30
Shivangi Kesharwani
771b0b212b ARM: dts: msm: monaco: Add qseecom compatible
Add dt support for qseecom for Monaco SOC.

Signed-off-by: Shivangi Kesharwani <quic_skesharw@quicinc.com>
2024-06-27 02:57:53 -07:00
Xiaoqi Zhuang
85c0e79e7b ARM: dts: msm: Remove jtag_mm node on monaco
Remove jtag_mm DT node as this feature is not enabled
on monaco.

Change-Id: I3fde6c254dbbdf9ced550fc53ba59a6e27866db0
Signed-off-by: Xiaoqi Zhuang <quic_xiaozhua@quicinc.com>
2024-06-26 10:15:00 +08:00
Koushik Immadisetty
43df192f51 ARM: dts: msm: add aon-custom-data glink node
Add aon-custom-data glink channel to download
misc data firmware to aon.

Change-Id: Id88488ed290d37cb3a5082c3f05125aee60ff78b
Signed-off-by: Koushik Immadisetty <quic_kimmadis@quicinc.com>
2024-06-24 19:03:25 +05:30
qctecmdr
70e128cf60 Merge "ARM: dts: msm: enable interconnect devices for Monaco" 2024-06-19 19:37:03 -07:00
qctecmdr
59e8971599 Merge "ARM: dts: msm: Add compatible string for cc nodes monaco" 2024-06-18 22:33:45 -07:00
qctecmdr
7a9d6bcf4e Merge "ARM: dts: msm: Add SDIO support for monaco" 2024-06-18 20:08:31 -07:00
qctecmdr
69b90ab4ae Merge "ARM: dts: msm: enable rpm-smd and mpm device node for Monaco" 2024-06-17 22:03:05 -07:00
mxing
acc834e002 ARM: dts: msm: Add SDIO support for monaco
This change adds SDIO support for monaco.

Change-Id: I1ce969435b01cad2f65de025deea6c545e7adfbf
Signed-off-by: mxing <quic_mxing@quicinc.com>
2024-06-18 10:06:50 +08:00
Raviteja Laggyshetty
b7766f108e ARM: dts: msm: enable interconnect devices for Monaco
Enable the interconnect devices for cnoc, snoc, bimc, clk_virt,
mmnrt_virt and mmrt_virt.
This will allow consumers to get their path and set bandwidth
constraints on them.

Change-Id: Iefa87748870578a5472ed08e3692d04a7a81337c
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
2024-06-16 07:46:18 -07:00
Pradnya Dahiwale
58daad1f6c ARM: dts: msm: dt snabpshot for Monaco SoC
Add dt snapshot of cpu level cache from branch msm-5.15.c2
commit 8ae5ffe89e0f ("ARM: dts: msm: Add mdsp heap for mDSP compute").

Change-Id: Id833a1f0894f29753c0ce08839bf3111b8d57a61
Signed-off-by: Pradnya Dahiwale <quic_pdahiwal@quicinc.com>
2024-06-15 19:10:51 +05:30
Raghavendra Kakarla
f085d759f8 ARM: dts: msm: enable rpm-smd and mpm device node for Monaco
This change adds the compatible string for rpm-smd and mpm
device nodes so that rpm-smd and mpm drivers will probe
during device boot up.

Change-Id: I8816a9e3dd8c9cef39440a1bf912d6d5f06f9f59
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
2024-06-13 15:35:27 +05:30
Prerna Singh
2f39297be8 ARM: dts: msm: Add compatible string for cc nodes monaco
Add the compatible strings for clk controller nodes in monaco.

Change-Id: I2acb4c9520bb217711a75eb8e79fc75ba98e587f
Signed-off-by: Prerna Singh <quic_prersing@quicinc.com>
2024-06-13 01:20:19 -07:00
Sayali Patil
573e7046af ARM: dts: msm: put dependency of dma-heap on SCM
Enforce dependency of dma heap driver on SCM driver
without which it will not work and this is in
the preparation of adding interconnect voting
in SCM node which if it gets added without this
change dma heap driver can result in NULL pointer
issue.

Change-Id: I641e2e1c7692dfd52dd1efa75064fbc8f2228fe2
Signed-off-by: Sayali Patil <quic_sayapati@quicinc.com>
2024-05-08 15:40:57 +05:30
Naresh Kumar Lingagalla
b471e42ad0 ARM: dts: msm: dt snapshot for monaco target
DT snapshot from branch msm-5.15.c2
commit 8ae5ffe89e0f ("ARM: dts: msm: Add mdsp heap for mDSP compute").

Change-Id: If3e807289b6d981865430c4e1a45dabf236fa345
Signed-off-by: Naresh Kumar Lingagalla <quic_nlingaga@quicinc.com>
2024-04-03 19:45:51 -07:00