Commit Graph

3050 Commits

Author SHA1 Message Date
QCTECMDR Service
cce90c8656 Merge "ARM: dts: qcom: Update correct cpu sensor to cpu pause mapping for kera" 2025-02-14 16:09:52 -08:00
QCTECMDR Service
4e2e6546e7 Merge "ARM: dts: msm: Replace force-low-pwm-size with mid-res-support" 2025-02-14 16:09:52 -08:00
QCTECMDR Service
d87e2de79b Merge "dt-bindings: pwm-qti-lpg: Add support for medium resolution PWM" 2025-02-14 16:09:52 -08:00
QCTECMDR Service
127dd773cc Merge "ARM: dts: qcom: Add show-resume-irqs device for sdxkova" 2025-02-13 02:14:26 -08:00
QCTECMDR Service
8dc0203733 Merge "ARM: dts: msm: add trusted touch properties for kera qrd" 2025-02-12 20:17:34 -08:00
QCTECMDR Service
262ebb47a7 Merge "ARM: dts: msm: Add PDC as wakeup parent to TLMM for sdxkova" 2025-02-12 01:15:55 -08:00
QCTECMDR Service
d81d2e684e Merge "ARM: dts: qcom: Update ESI affinity mask for tuna" 2025-02-12 01:15:55 -08:00
QCTECMDR Service
9af51f82de Merge "ARM: dts: qcom: Update cpu pause mappings to cpu tsens sensors for tuna" 2025-02-12 01:15:55 -08:00
QCTECMDR Service
bcc26b58a4 Merge "ARM: dts: msm: Update ESI-affinity CPUs for Kera" 2025-02-12 01:15:55 -08:00
QCTECMDR Service
f5b12d9160 Merge "ARM: dts: msm: Add show-resume-irqs device for tuna" 2025-02-11 05:48:04 -08:00
QCTECMDR Service
7c6955a9c9 Merge "ARM: dts: msm: Enable idle states for Kera VM" 2025-02-11 05:48:04 -08:00
QCTECMDR Service
c3ce75c007 Merge "ARM: dts: msm: Add show-resume-irqs device for kera" 2025-02-11 05:48:04 -08:00
Priyansh Jain
c3ef7b651b ARM: dts: qcom: Update correct cpu sensor to cpu pause mapping for kera
Update correct cpu sensor to cpu pause mapping for kera.

Change-Id: I56d72cb0042d957b59ecd8c9c7ce01e978982a0a
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
2025-02-11 05:06:27 -08:00
Sneh Mankad
08f767f1f1 ARM: dts: qcom: Add show-resume-irqs device for sdxkova
Add show-resume-irqs feature to show the irq number that triggered
suspend exit.

Change-Id: I54c59bdc1ae476ca7a86fd34976744eb3db6dcf9
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2025-02-11 18:26:38 +05:30
Priyansh Jain
7d02285338 ARM: dts: qcom: Update cpu pause mappings to cpu tsens sensors for tuna
Update cpu pause mappings to cpu tsens sensors for tuna.

Change-Id: I998e4e916e8f552d2705cd51b1d6053070fc2470
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
2025-02-10 21:10:32 +05:30
QCTECMDR Service
e475c0187e Merge "ARM: dts: qcom: change include files for kera iot dts" 2025-02-10 03:57:39 -08:00
Bhasker Reddy Komatireddy
b11d5022f3 ARM: dts: qcom: change include files for kera iot dts
modify the include files for kera iot dts.

Change-Id: Ia3b7d66bc29d9ea68a71eedd2131aa088d773319
Signed-off-by: Bhasker Reddy Komatireddy <quic_kbhasker@quicinc.com>
2025-02-06 05:22:36 -08:00
Manish Pandey
08be6230aa ARM: dts: msm: Update ESI-affinity CPUs for Kera
Update MCQ esi-affinity CPUs for kera to enhance performance.

Change-Id: I1f6288b7da2e90d0c40f287bcf51a1eaa3147dfe
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
2025-02-06 18:35:15 +05:30
Sneh Mankad
b5dcb3d9e2 ARM: dts: msm: Enable idle states for Kera VM
Enable idle states for kera VM to enable VCPUs to enter LPM
when no load is running on them.

Change-Id: I0e01f36557fedf68a7beb152025ab14b66fff7dc
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2025-02-06 14:44:37 +05:30
Sneh Mankad
2d48e1654d ARM: dts: msm: Add show-resume-irqs device for kera
Add device to show wakeup irq during system resume.

Change-Id: I1add0f44cd1773b5f61afbfc25f2c70f3323ceda
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2025-02-06 12:46:56 +05:30
Sneh Mankad
e4900f19c2 ARM: dts: msm: Add show-resume-irqs device for tuna
Add show-resume-irqs device to show the wakeup irq after system
resume.

Change-Id: I41b742c4251974580c931b7f3c0530aa7fe04333
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2025-02-06 12:44:33 +05:30
QCTECMDR Service
88460cd362 Merge "ARM: dts: msm: Update initial DCVS devices for Kera" 2025-02-05 17:55:16 -08:00
Manish Pandey
df7caa4483 ARM: dts: qcom: Update ESI affinity mask for tuna
Update ESI affinity mask in tuna device tree for UFS
performance reasons.

Change-Id: Ie06355e2d2604553da0f1e72b6d46032c55cdcf4
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
2025-02-05 16:32:24 +05:30
QCTECMDR Service
6086f3584a Merge "ARM: dts: msm: Remove some ocp-notifier supplies from sun HDK platforms" 2025-02-04 06:19:01 -08:00
QCTECMDR Service
5a8b2807b5 Merge "ARM: dts: msm: Add mode thresholds for S2B for tuna" 2025-02-03 22:02:46 -08:00
Fenglin Wu
66e7d8554b ARM: dts: msm: Remove some ocp-notifier supplies from sun HDK platforms
Sun HDK platform is expected to work without the GNSS board (which also
holds PMR735D) being attached.  If the board is not attached,
regulator-ocp-notifier probe may fail as it references some regulators
on PMR735D which do not get probed.

Remove those regulator references from regulator-ocp-notifier as they
are not strictly necessary under it.

Change-Id: Ie6f35a9c6142fe54d7191f9a392074f2e39b2bee
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
2025-02-03 22:01:35 -08:00
QCTECMDR Service
cd65ec2420 Merge "ARM: dts: msm: SLC SCID Heuristics support for tuna" 2025-02-03 04:51:01 -08:00
Kavya Nunna
2c23f45466 ARM: dts: msm: Add mode thresholds for S2B for tuna
Add mode voting support for S2B for tuna platforms.
Update the retention threshold to 50ma as per the HW
recommendations.

UFS needs to do mode vote on vccq parent, add mode vote
for S2B for tuna.

Change-Id: I3101f3f1fb0255bdee94d4b854f7b8c73186a035
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2025-02-03 17:45:29 +05:30
QCTECMDR Service
f6652a0da3 Merge "ARM: dts: qcom: Correct gpio pins for i2s0_sd0" 2025-01-31 15:33:45 -08:00
QCTECMDR Service
c7e57432fe Merge "ARM: dts: msm: Update regulator support for tuna" 2025-01-31 15:33:45 -08:00
Kavya Nunna
47a0cb5019 ARM: dts: msm: Update regulator support for tuna
Add RET mode support for L2G/L3G for tuna platforms as per
the sleep setting recommendation.

While at it set init mode as LPM for L3G and L6K
regulators. As clients always vote for 0 load, the
regulator framework will not apply it and the HPM
init-mode will not change, leading to higher power
consumption. So update the LPM for L3G and L6K regulators.

Change-Id: I5b210ac3e9ffee94889c2390becfaa5eb6c235ab
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2025-01-31 01:45:37 -08:00
Sayantan Chakraborty
727537d061 ARM: dts: msm: Update initial DCVS devices for Kera
Update initial DCVS devices for Kera. This
includes frequency and memlat mapping tables.

Change-Id: Ie29a3e0d831fe308b9ee843aba34f6484f461933
Signed-off-by: Sayantan Chakraborty <quic_saycha@quicinc.com>
2025-01-31 15:07:20 +05:30
Ravulapati Vishnu Vardhan Rao
729d8161a7 ARM: dts: qcom: Correct gpio pins for i2s0_sd0
Update of correct gpio pin for i2s_ds0.

Change-Id: I6716bdd61c90909cbbc646638ea97d98ae5b50ba
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
2025-01-31 01:24:03 -08:00
QCTECMDR Service
0371405d3e Merge "ARM: dts: msm: Add pcie and display voter devices for KERA" 2025-01-30 02:49:56 -08:00
QCTECMDR Service
5aadf83b9d Merge "ARM: dts: qcom: Add interconnect-names in rproc cdsp node for tuna" 2025-01-28 21:56:35 -08:00
QCTECMDR Service
ed96070518 Merge "ARM: dts: msm: PCIe CESTA related dt properties for tuna" 2025-01-28 21:56:35 -08:00
QCTECMDR Service
2d4f9dc466 Merge "ARM: dts: msm: Update QoS for tuna SDC2" 2025-01-28 21:56:35 -08:00
Shivendra Pratap
07d3ff5e66 ARM: dts: qcom: Add interconnect-names in rproc cdsp node for tuna
Add interconnect-names in remoteproc cdsp node for tuna.

Change-Id: I4551479bc259584728a681962e1a67f32daba29b
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
2025-01-27 15:48:02 +05:30
QCTECMDR Service
d6033aac0a Merge "ARM: dts: msm: Add fps entry for kera" 2025-01-24 13:29:51 -08:00
Manish Pandey
5d6949eaf0 ARM: dts: msm: Update QoS for tuna SDC2
Update tuna SDC QoS cpu mask.

Change-Id: I6f925e294ef0e8511f24339e256aafcd3f2fe32d
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
2025-01-24 19:34:51 +05:30
Paras Sharma
1447a58e8d ARM: dts: msm: PCIe CESTA related dt properties for tuna
PCIe CESTA related dt properties for tuna.

Change-Id: I4bb53ed6378bb6f02600ec8d6109788a2bc84312
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
2025-01-24 11:02:52 +05:30
QCTECMDR Service
d81e0bbc55 Merge "ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna" 2025-01-23 17:04:19 -08:00
QCTECMDR Service
bbeca0cca0 Merge "ARM: dts: msm: Add support for dispcc_mx clock controller node" 2025-01-23 11:57:37 -08:00
QCTECMDR Service
7f872ad106 Merge "ARM: dts: msm: Update S1B/S2B/S3B min voltages for tuna" 2025-01-23 11:57:37 -08:00
Priyansh Jain
fdf5b9c6bd ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna
Update gpu mitigation level for tuna and BCL threshold based on latest
recommendation.

Change-Id: I51e9e60d6439439ce76fa4cfbdf7e4d909ef727e
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
2025-01-23 18:39:45 +05:30
QCTECMDR Service
f928797cf4 Merge "ARM: dts: msm: Fix the protected clocks for gcc" 2025-01-23 02:31:49 -08:00
Rui Chen
a04cc4f29b ARM: dts: msm: add trusted touch properties for kera qrd
Add trusted touch properties for kera qrd platforms.

Change-Id: I6f6c65fcaa5300850c543ebe708b00a005a0a40f
Signed-off-by: Rui Chen <quic_ruc@quicinc.com>
2025-01-23 16:32:57 +08:00
Sanskar Omar
4b87355d27 ARM: dts: msm: Add fps entry for kera
Add fps entry for kera.

Change-Id: I04ff258f3d36345f9c618a3745253371a9e49420
Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com>
2025-01-23 11:28:21 +05:30
Prem Sai Grandhi
425ccfd29a ARM: dts: msm: SLC SCID Heuristics support for tuna
Enables HEURISTICS SCID for tuna.

Change-Id: Ie88346943ba30dbcdab502b56d20614a3f296118
Signed-off-by: Prem Sai Grandhi <quic_grandhir@quicinc.com>
2025-01-23 10:35:53 +05:30
QCTECMDR Service
1732034de5 Merge "ARM: dts: msm: Add support for guest-cpus" 2025-01-22 14:29:26 -08:00