Add devicetree soccp node for Sun SoC. In addition to existing smp2p INT's
SOCCP H/W needs 2 more INT for controlling the power state of the H/W.
sleep bit and wakeup bit on master kernel corresponds to these INT.
Change-Id: I00d2f6a3fb76f306fa070df87f22bb2d07cb4c3b
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
This reverts commit 0d05778dbb.
Enable UFS LPM support.
Change-Id: I6e65310ad1ca98fc20fc148dac3f342375638841
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
Use 0x17 pmu event as miss-ev in llcc memlat for sun.
Change-Id: Ifbd710d9fcb24f7442f2b6d6d8e94f858e48c326
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Enable low power modes for sun through kernel command
line parameters.
Change-Id: Ifd4b8fcce8d6b2c0b4f6a4c2dcb088ae8c8fa661
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Common DT format for sd card changes across targets.
Change-Id: I6d3fc5141ed8e73882dcf0f95706501b8208164b
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
This reverts commit b57a26b88e.
There is an issue with MCQ mode. We need some time to fix
the issue, so revert to legacy UFS mode for now.
Change-Id: Iaf9a3332ba23fe3bd2be4900c79698ed32903efc
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
With commit (851140def4: Allow memory from lower 4G for adsp/cdsp/modem)
We were limiting addresses to below 4GB for ADSP/CDSP metadata passed to
TZ. The issue with S1/S2 mapping is caused by a flag in the hyp config
file, removing the restriction for ADSP/CDSP metadata memory.
Change-Id: Id42350a8ab2ddff3c74104f610d83a70681c23c6
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Set the proper EUD UTMI switch delay for when EUD moves between modes.
This allows for the delay to be decreased, which addresses USB core soft
reset timeouts.
Change-Id: Id3f02ad4f14b68977baa3393c692360a762b0ee2
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Update bootargs for Sun SoC to align with existing SoCs.
Change-Id: I50c16ddabc4559b84f815d10956c36b63dbafd00
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Enable the qrtr gunyah transport for sun. This enables the QRTR
Gunyah transport on the primary VM which kickstarts the qrtr protocal
between tuivm and pvm.
Change-Id: I6cc9d73d087107de9153a781aea255a077f8ee0c
Signed-off-by: Kishore Kumar Ravi <quic_kiskum@quicinc.com>
Update scm node to include dload-mode register needed
to set the proper download mode.
Change-Id: I2f2075ec43f1ba452fff6077685afcf6dc7912be
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
The gx_clkctl_gx_gdsc requires both gpu_cc_cx_gdsc and VDD_GX to access
its configuration registers. We access these registers during probe, so
we need to ensure these dependencies aren't disabled until after our
probe completes. Add proxy consumers for this.
After probe, the parent-supply will ensure VDD_GX is enabled before we
touch registers in the regulator_enable/disable paths. And for the CX
GDSC dependency, the client already enables it before the GX GDSC due to
historical functional requirements between the CX and GX sides.
Change-Id: I49f5654a8a86644074c76788de821eb8ae621d09
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Add the nodes for enable qrtr communication between primary vm and
oemvm on sun.
This adds platform devices and vdevice descriptions to start the
qrtr gunyah transport on both primary vm and oemvm device trees. This
also adds the device tree node to configure qrtr as node id 21 on oem
vm.
Change-Id: I1575853a67fe9edbcb751dbb71062b6da624d9be
Signed-off-by: Kishore Kumar Ravi <quic_kiskum@quicinc.com>
Enable the UFS MCQ feature on the Sun platforms.
Change-Id: I6d58bb14ea085cfd792cfea0073cccfa8be38edb
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
Arch timer and memtimer frequencies were set incorrectly for
silicon, so set to 1 GHz.
Change-Id: I309c1d79712145a4c86d168d923f91d6a6792142
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Add device tree node for measure nodes and enable
debug cc driver on Sun.
Change-Id: I5475161d0f1d7ce488b6372d19ba1212dea238f5
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
Add bindings for llcc_perfmon tool, populate llcc_perfmon
as child node of llcc cache-controller node.
Change-Id: Ib65da3295569297697cc039d39f3aef95887e482
Signed-off-by: Aman Kanwar <quic_akanwar@quicinc.com>
