Add DT entry to enable the memory onject support for
smcinvoke.
Change-Id: I87b62b048e94e2aad2a8329b275bbd8d75ae6cc7
Signed-off-by: Amirreza Zarrabi <quic_azarrabi@quicinc.com>
Add device tree support for v8 power grid with Kiwi on RCM
platform for Sun SoC.
Change-Id: I3fd53532099978b54dd13957e977115e1714819d
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Add compatible string for APQ variant on RCM platform for
Sun SoC.
Change-Id: I1d20c8b8c5f8156ae299fd2646160086859badd5
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
NFC on Sun SoC only supports v8 but is defaulting to v6 power grid.
Update NFC on Sun SoC to use v8 power grid now for MTP, CDP platforms.
Change-Id: I0c5c93adf1b6c9dfa5fd05b975e4d184995e60e5
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Update thermal pause and cpu hotplug cooling devices to support
partial good cpus.
Also remove duplicate group pause cooling devices.
Change-Id: Idb6c72f42a89d4d643a5c658d24e1045d3ef8b80
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
Remove unused modem thermal sensors and thermal mitigation devices
which are no longer needed for sun as per recommendation.
Also add sub1 related thermal mitigation devices.
Change-Id: Iacb2d66f7a65e52559211aa4710eba4cae67831e
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
Enable DDR cooling device for sun which allows it to vote for
specific DDR bandwidth under thermal conditions.
Change-Id: I55b8c61d4cf580392cf76ae1ed6328b69cca6487
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
Enable userspace CPU frequency cooling device for sun. This config
will enable cluster0 and cluster1 to be registered as cooling devices.
Change-Id: I4a88c5f03b9da0e4ef1406e7e973d148c074dd93
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
Add proxy enable properties to the DSI core and panel supplies
to support continuous splash.
Change-Id: Ib8d0ae5340eee86b29b57284226a59d3152bfab7
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
Configure the L2F and L3F regulators on Sun boards to be always
enabled. This ensures that WCN hardware operates correctly.
Use low power mode (LPM) as the initial mode to reduce current
consumption before BT or WLAN is enabled.
Change-Id: I7820a19dd89fda0abfe6094420a8d72c8acbe33a
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add index table to llcc pmu for sun to override the
default register index mapping.
Change-Id: I1f470f011ddd00375bbad345432b8706ab0ae4be
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Add entries to specify the dev-id, net-id and low-latency fields
to configure forwarding in qrtr-mhi transport for HMT and HSP.
Forwarding via APPS qrtr-mhi should be disabled in case of HMT
(dev-id:1107) since there's a direct MHI satellite path between
ADSP and WLAN, and should be enabled for HSP (dev-id:1103).
Change-Id: I1ef7b543dcff3d187efcf5f7cfd8ac8587c55bd6
Signed-off-by: Sarannya S <quic_sarannya@quicinc.com>
Correct the base address for etf0_ncc0 on sun.
Change-Id: Ic78f394c3cf3895854c6e9ae5480f73760825f72
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Sun power grid V8 boards have seen a boot-up issue seemingly caused
by device tree overlays not being applied as expected. This results
in the rpmh-regulator-mxlvl device not probing correctly as the
proxy-supply property isn't found/resolved.
Correct this issue by moving regulator phandle creation from V8
overlay DTs into the base DT and not creating any regulator nodes
in the overlay DTs (which are duplicates of ones in the base DT).
Change-Id: I2b3515d1ddfa4a9961ef892af61beb8e3afdfd1a
Fixes: 3e728ec361 ("ARM: dts: qcom: add PMIC device support for sun V8 power grid boards")
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Disable cti shrm because kernel do not have access to it on external build.
Change-Id: Ia225f325a929aeeba56a38dd1c627d735aaf6a56
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
The CPUCP SCMI notifications are used for thermal limits. Add the
mailbox used for them.
Change-Id: I51eadabe997670190414b9b767439be5064046c7
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
