Although this is already present in CONFIG_CMDLINE in gki_defconfig, it
appears to be being overridden by the commandline specified in devicetree.
Change-Id: If61b4cfd11a15a7c36fb01875b7c77ac7c5bde8b
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Setting dma32_disable causes all memory to be placed in ZONE_NORMAL,
and reduces overhead in page allocation.
Change-Id: I770fe2688081b457a121afd23d6d924423680e5f
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add 4.5 MB for use by minidump_memory driver.
Add 2 MB for use by memshare IMS usecase.
Change-Id: I5f3897e24dd4b7a1c7bd3f883c4837eaa3ca384a
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add the list of PCIe SM registers that need to be dumped
to the PCIe dt node in sun.
Change-Id: Ic2e0518ac611ef5e409f88dcd0f69eb2ce4d8566
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Removed SP PBL Patch Version Register from sun dtsi
since it is no longer used.
Change-Id: I52b28ed1a07676188a39c09b72c0e2364cfc0ac2
Signed-off-by: Magesh M <quic_murugan@quicinc.com>
Currently, charger FW configures and enables ship mode in parallel with
shutdown activity. This can cause a race condition leaving the device in
a bad state if the device is powering off while SW is still issuing SPMI
writes.
Add the battery charger "qcom,ship-mode-immediate" property on Sun
platforms so that ship mode will be configured immediately by charger FW
after user sets ship_mode_en.
Change-Id: I55a78c7b5c59b8b82519713fb4267d081c54a92f
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Currently, charger FW configures and enables ship mode in parallel with
shutdown activity. This can cause a race condition leaving the device in
a bad state if the device is powering down while SW is still issuing SPMI
writes.
Add new "qcom,ship-mode-immediate" property to flag that ship mode should
be immediately configured after user sets ship_mode_en to avoid this
race condition.
Change-Id: I16b1e307cac8befff7a1136de1cb522e03a95c46
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Add the pm8550_pa_therm2 ADC channel as well as the corresponding
thermal zone device which can be used by thermal SW.
Change-Id: I2c583ca8c00a67a122b6c1b7622436bcf8058165
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Configure the L1F and L3G active-only regulator to be always enabled
in high power mode (HPM). These regulators power REFGENs and PLLs
used by the application processor itself. Unconditional active-only
voting is needed since the software running on the application
processor won't be capable of removing L1F and L3G votes after the
application processor subsystem is power collapsed.
Change-Id: I750da467f408f35b6015a2286696609f234abdc4
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add active-only and sleep-only regulator subnodes for rpmh-regulator
devices L1F and L3G on Sun boards. This allows requests to be issued
for them that are tied to the application processor's power collapse
state.
Change-Id: Ia8fd8c3aef5c5abfec1044ba3287b1a59f1d5824
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add qcom,ramoops binding for its device and it is exactly copy of
ramoops device but differ in just memory is dynamically reserved
during early boot.
Change-Id: I2b2b288061ba001aa8cc9a73fad1176a01ce4769
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Add dynamic ATID support for remote etm and non HLOS related TPDM.
Change-Id: Ib20d304b27377e19ca347e81eab587de41713ed0
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Disable tpdm-sdcc2 on sun, because kernel can't enable some clocks of it.
Change-Id: I5f8a29a6991d1b59e82bce0caf4149f8e9993697
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Add minidump vdeivce in vm-config to support minidump for Sun TUIVM.
Change-Id: I8aed4b1bec0b137bdcf8e103af59eb0cb70b999a
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
Add device tree files to support v6 and v8 power grids
for MTP platform with QMP1000 on Sun SoC.
Change-Id: Ic8636091236e3bcedd5af1fb2c5742371483607d
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Adopt the upstream ufs bus voting implementation using
commit <03ce80a1bb8>
("scsi: ufs: qcom: Add support for scaling interconnects").
With this implementation, the Qualcomm's bus voting parameters
are moved to the driver source code. As a result, remove the bus
voting DT entries here.
Change-Id: I6366fe76fba4022cbd97bb757eaac2183274bcd2
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
The upstream linux community has added a devicetree property
"iommu-addresses", which describes to the DMA api what IOVA
addresses a device can/cannot use. So we replace “qcom,iommu-
dma-addr-pool” by “iommu-addresses” since kernel 6.5 to follow
upstream.
Change-Id: If18f14d6cb13aa2ed67c1417295fc30723b0c932
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
has added a devicetree property "iommu-addresses", which
describes to the DMA api what IOVA addresses a device
can/cannot use. So we replace “qcom,iommu-dma-addr-pool”
by “iommu-addresses” since kernel 6.5 to follow upstream.
Change-Id: I9c99fc931fa9a59a472f371bfb59f615f83539f4
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Update pcie phy settings for sun to version 94.
Change-Id: I5af8d79cecba0ee1088f379b0d823f3a841e8420
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
This device is necessary to notify the scheduler about CPU thermal
pressure.
Change-Id: Ibf1e636dfee32ab8b7c3b9202264603d638c577a
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Add documentation for the qcom,cpufreq-thermal device, which is used to
handle CPU thermal limit mailboxes notifications.
Change-Id: I6e2c33d2a9d55ab4bb2c8361091ebb0110739d43
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
