Update sde-qos-cpu-mask value for sun target.
Change-Id: I1e3a94b276d7ac31d693bdc73a46cc40189d5c43
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
This reverts commit 33797c66a4.
Reason for revert: retention to be handled through clock api.
Change-Id: Ib7e54924779e78f839a80e91342344c28b877b0c
Signed-off-by: Anjaneya Prasad Musunuri <quic_aprasad@quicinc.com>
The change updates demura version and size.
Change-Id: Ie3a71c6a04f38054d4a192c1b538fb53aa02e135
Signed-off-by: Yuchao Ma <quic_yuchaom@quicinc.com>
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
To support MDP LUT retention, programming of the disp cc memory region
is required.
Update the sun DTSI definition to define the minimal disp cc
memory region needed for LUT retention functionality.
Change-Id: I88eb0860a540e5f83ae86e5491f31aa19fbdac38
Signed-off-by: Christopher Braga <quic_cbraga@quicinc.com>
This change moves the soccp phandle property needed for
soccp power vote.
Change-Id: I506c814517a2019a13450822f86d16e2c9a535e4
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
This change adds support for configuring mdp hw-fence ctl
register offset, as this value can change from target-to-target.
Change-Id: I436bec0732473c21cf4753cb292204ce618de512
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
This change adds the soccp phandle needed for SOCCP power vote for
hw-fencing usecases.
Change-Id: Ife59c04e9ba166493f7b7078e0b22848d2a444e2
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
This change adds the register address and size for ipcc base and
the dpu client physical id to be used for hw fencing register access.
Change-Id: I6a389626c186cc0f5a10900e890ecd33f6a606d2
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
Update BW limit values based on QOS recommendation for sun target.
Change-Id: Id3ba8542cb89bd4b8d682e7d48841c6a29e2c6d6
Signed-off-by: Jayasri Sampath Kumaran <quic_jsampath@quicinc.com>
The Sun platform introduces support for AI Scaler hardware. Update
the device tree definition to provide AI Scaler hardware details
and register access to the MSM DRM driver.
Change-Id: I38944376bc4579759391ff1e70882bf812dc133e
Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com>
This change updates ucsc version to support INT2FP/FP2INT enable.
Change-Id: I548cef05759cf3ee557d7424b96c5f2ba2ba82d3
Signed-off-by: Renchao Liu <quic_rencliu@quicinc.com>
IGC functionality has been updated to support high-precision mode.
Update the IGC versions accordingly.
Change-Id: I1f57014763c05c26318de703447a6a2c7649a4f7
Signed-off-by: Qing Huang <quic_huangq@quicinc.com>
DSPP functionality has been updated to support high precision mode.
Update the DSPP block versions accordingly.
Change-Id: Iad137c4fc54127c05cc92b8ed4948e2b78e43437
Signed-off-by: Renchao Liu <quic_rencliu@quicinc.com>
The Sun platform introduces support for mDNIe hardware. Update the
device tree definition to provide mDNIe hardware details and register
access to the MSM DRM driver.
Change-Id: I783d7baeca2886c08329feeeef4f8a1c445ddbb7
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
Add device tree files required for DPU driver on sun target.
Move bindings for all mdp, dsi, panels, hdcp to opensource project.
Change-Id: I1c6575313e33c5727f48ce94fe8b51cd9c62995d
Signed-off-by: Varsha Suresh <quic_varssure@quicinc.com>
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
