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Author SHA1 Message Date
QCTECMDR Service
a8ce3af1de Merge "ARM: dts: msm: Add interconnect devices for SM6150" 2025-05-07 03:11:25 -07:00
QCTECMDR Service
5ec7f40335 Merge "dt-bindings: smb1398: dt binding for smb1398-charger device" 2025-05-05 22:09:18 -07:00
QCTECMDR Service
de95028d6e Merge "dt-bindings: qpnp-qg: Add DT binding for qpnp-qg device" 2025-05-05 22:09:18 -07:00
Chintan Kothari
8d297483dc ARM: dts: msm: Add interconnect devices for SM6150 
Add interconnect devices for camnoc_virt, ipa_virt, mc_virt,
dc_noc, gem_noc, config_noc, system_noc, aggre1_noc and
mmss_noc. This will allow consumers to get their
path and set bandwidth constraints on them.

Change-Id: I8c2eb0b8a63252cbfcfe44355ad9b4421c8aee5c
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
 2025-04-30 00:23:53 +05:30
Aryan Modi
ed8af40778 dt-bindings: smb1398: dt binding for smb1398-charger device 
Add DT binding documentation for smb1398-charger device
in yaml format.

Change-Id: I100c271fbb0965894a3dfb9b2072b60ecfc8f4ad
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
 2025-04-28 18:29:20 +05:30
Aryan Modi
ef15bb1154 dt-bindings: qpnp-qg: Add DT binding for qpnp-qg device 
Add DT binding documentation for qpnp-qg Qguage device.

Change-Id: I5b68e4b12f86bc2953d1369ff51d28aed26752b9
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
 2025-04-28 18:21:54 +05:30
Chintan Kothari
63ca55d666 ARM: dts: msm: Add support for clock nodes and gdsc's for SM6150 
Add support for cpufreq_hw, clock controller nodes and their
corresponding gdsc's for SM6150.

Change-Id: I7d64cbe80eb7f10277acce0a0c91fb788c3c99dc
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
 2025-04-28 11:34:49 +05:30
QCTECMDR Service
8adbf5b537 Merge "ARM: dts: msm: gunyah: Add test nodes for parrot vm" 2025-04-26 17:41:00 -07:00
QCTECMDR Service
dd1d0df247 Merge "dt-bindings: Add entry for dt-bindings of qpnp-pdphy" 2025-04-25 10:54:40 -07:00
QCTECMDR Service
eb41cb25ad Merge "dt-bindings: thermal: Add legacy tsens driver compatible string" 2025-04-25 03:09:48 -07:00
QCTECMDR Service
d5ee949095 Merge "dt-bindings: clock: Add clock controllers compatible for SM6150" 2025-04-24 23:13:19 -07:00
QCTECMDR Service
b996c23ebf Merge "ARM: dts: msm: Add pvm_fw_mem region for parrot" 2025-04-24 12:01:32 -07:00
QCTECMDR Service
f14798cb75 Merge "ARM: dts: msm: Update iomemory-ranges for parrot-vm" 2025-04-24 08:06:50 -07:00
Aryan Modi
e0116ea457 dt-bindings: clock: Add clock controllers compatible for SM6150 
Document compatible for GCC/GPUCC/DISPCC/DEBUGCC/VIDEOCC/CAMCC
on SM6150 Platform.

Change-Id: Id463d7ee9333e65f97a455d511411ac0feb378dd
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
 2025-04-24 17:42:37 +05:30
QCTECMDR Service
d64cf3910e Merge "FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Display clock controller" 2025-04-24 04:01:26 -07:00
Aryan Modi
98d685afc7 dt-bindings: Add entry for dt-bindings of qpnp-pdphy 
Add documentation of qpnp-pdphy in yaml format.

Change-Id: I1e21a59fad61c856132628dd80dbbb96971b025f
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
 2025-04-24 15:40:52 +05:30
Swetha Chikkaboraiah
82fbb9e687 ARM: dts: msm: Add pvm_fw_mem region for parrot 
Add pvm_fw_mem region for parrot SoC.

Change-Id: Ibcde4e8c871c9f178d38e87354c7bf75bda01933
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
 2025-04-24 09:27:46 +05:30
QCTECMDR Service
76882082ff Merge "ARM: dts: msm: Add smp2p, qmp_aop and aoss_qmp support for SM6150" 2025-04-23 10:20:22 -07:00
Taniya Das
cb98bc6b81 FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Display clock controller 
Add DT bindings for the Display clock on QCS615 platforms. Add the
relevant DT include definitions as well.

Change-Id: If1b30f1badf667bca1728502c01c1de1e5787ce2
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/linux-arm-msm/20250119-qcs615-mm-v4-clockcontroller-v4-4-5d1bdb5a140c@quicinc.com/
Patch-mainline: linux-arm-kernel @ 19/01/25, 15:52
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Dongfang Zhao <quic_doz@quicinc.com>
 2025-04-23 03:34:25 -07:00
Saranya R
357667d318 ARM: dts: msm: gunyah: Add test nodes for parrot vm 
Add test-dbl-tuivm, test-msgq-tuivm and tlmm-vm-test
nodes for parrot and parrot vm.

Change-Id: I15e3312cf74f9ddae27b93a941e7d6c7df844c9b
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
 2025-04-23 12:52:27 +05:30
QCTECMDR Service
4e9e2ae78d Merge "ARM: dts: msm: Update regulator voltages of qcs610 variants" 2025-04-22 22:38:27 -07:00
Swetha Chikkaboraiah
0e84ac98c6 ARM: dts: msm: Update iomemory-ranges for parrot-vm 
Split iomemory-ranges for parrot-vm to be inline
with AC aperture settings.

Change-Id: I6dbf890bd607d916d2429577af6ad164e3cd51db
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
 2025-04-22 22:13:23 -07:00
Dhaval Radiya
ef3e0beac6 ARM: dts: msm: Add smp2p, qmp_aop and aoss_qmp support for SM6150 
Add smp2p, qmp_aop and aoss_qmp device tree node to support
SM6150 platform.

Change-Id: Iff80c2e40ebecd26f2c649007e79506984bfc35b
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
 2025-04-23 08:55:12 +05:30
QCTECMDR Service
c437f3d7d3 Merge "dt-bindings: Add power-state dt-bindings" 2025-04-22 11:01:17 -07:00
QCTECMDR Service
ea3442265e Merge "dt-bindings: soc: qcom: Add documentation for ufs-phy-qmp-v3-660" 2025-04-22 03:10:23 -07:00
Dhaval Radiya
4b66fec2e7 ARM: dts: msm: Update regulator voltages of qcs610 variants 
Update the regulator voltages for iot and opk variants of qcs610.

Change-Id: I40ceeb873e8be62c5213b978793c33d7d539c747
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
 2025-04-21 22:56:00 -07:00
Rajkumar Patel
71e75ace0d dt-bindings: Add power-state dt-bindings 
Add bindings of power-state device in yaml format.

Change-Id: I7abd870f0a0f46b5bf293f15d4215fff3e85e70f
Signed-off-by: Rajkumar Patel <quic_rajkpate@quicinc.com>
 2025-04-22 11:21:36 +05:30
QCTECMDR Service
ade8de8fee Merge "FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller" 2025-04-21 22:41:24 -07:00
QCTECMDR Service
4a6f6d40e8 Merge "FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Video clock controller" 2025-04-21 22:41:24 -07:00
QCTECMDR Service
de59686b08 Merge "FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller" 2025-04-21 07:25:09 -07:00
QCTECMDR Service
18a56d1180 Merge "FROMLIST: dt-bindings: clock: qcom: Add QCS615 GCC clocks" 2025-04-21 07:25:07 -07:00
QCTECMDR Service
c3eed3a68b Merge "dt-bindings: arm: Add bindings for sm6150 llcc" 2025-04-18 12:15:51 -07:00
QCTECMDR Service
7695df9f94 Merge "dt-bindings: clock: Add rpmh-clk bindings for sm6150" 2025-04-18 04:28:27 -07:00
Monish Chunara
20b4753cd4 dt-bindings: soc: qcom: Add documentation for ufs-phy-qmp-v3-660 
Add documentation for ufs-phy-qmp-v3-660 phy driver used for sm6150
platform.

Change-Id: I24ac03261f3c7eb59f928bddf330bcc08c23a4dd
Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com>
 2025-04-18 16:27:55 +05:30
Taniya Das
e9b2fd1e94 FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Video clock controller 
Add DT bindings for the Video clock on QCS615 platforms. Add the
relevant DT include definitions as well.

Change-Id: I0279899c5b53b9dbcba9152ac49d70e87011cec9
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/linux-arm-msm/20250119-qcs615-mm-v4-clockcontroller-v4-8-5d1bdb5a140c@quicinc.com/
Patch-mainline: linux-arm-kernel @ 19/01/25, 15:52
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Dongfang Zhao <quic_doz@quicinc.com>
 2025-04-18 15:02:53 +05:30
Taniya Das
bb399e6f11 FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller 
Add DT bindings for the Graphics clock on QCS615 platforms. Add the
relevant DT include definitions as well.

Change-Id: Ia0231c87be0d5217100013c4ab7c3b0a83c3e134
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/linux-arm-msm/20250119-qcs615-mm-v4-clockcontroller-v4-6-5d1bdb5a140c@quicinc.com/
Patch-mainline: linux-arm-kernel @ 19/01/25, 15:52
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Dongfang Zhao <quic_doz@quicinc.com>
 2025-04-18 15:01:35 +05:30
Taniya Das
39118055b9 FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller 
Add DT bindings for the Camera clock on QCS615 platforms. Add the
relevant DT include definitions as well.

Change-Id: Iccb0ed8449b3efc4f378311513e757a11c72ae06
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/linux-arm-msm/20250119-qcs615-mm-v4-clockcontroller-v4-2-5d1bdb5a140c@quicinc.com/
Patch-mainline: linux-arm-kernel @ 19/01/25, 15:52
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Dongfang Zhao <quic_doz@quicinc.com>
 2025-04-18 15:00:04 +05:30
Taniya Das
377e8acc3c FROMLIST: dt-bindings: clock: qcom: Add QCS615 GCC clocks 
Add device tree bindings for global clock controller on QCS615 SoCs.

Change-Id: I112235218ab3e7d9e2a44024db8afcc2a1271111
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/all/20241016-qcs615-clock-driver-v3-3-bb5d4135db45@quicinc.com/
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Marco Zhang <quic_zhangx@quicinc.com>
 2025-04-18 14:58:14 +05:30
QCTECMDR Service
8876cc2e78 Merge "dt-bindings: interconnect: add interconnect bindings for SM6150" 2025-04-17 00:26:09 -07:00
QCTECMDR Service
3448abbdd7 Merge "ARM: dts: msm: Add ldo-ocp-notifier support for kera" 2025-04-16 11:20:38 -07:00
QCTECMDR Service
ad8f766707 Merge "ARM: dts: msm: Add smem and syscon support for SM6150" 2025-04-16 11:20:38 -07:00
Aryan Modi
807f033164 dt-bindings: clock: Add rpmh-clk bindings for sm6150 
Add rpmh clock bindings for sm6150 platform.

Change-Id: I8b330755340363cabe6032edc6aa225b19bc7d94
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
 2025-04-16 11:51:20 +05:30
Aryan Modi
8c6f16b12a dt-bindings: interconnect: add interconnect bindings for SM6150 
Add interconnect device bindings. These devices can be used to
describe any RPMH and NoC based interconnect devices.

Change-Id: Ic9a21d11bb3ce92ffb0cde91739990441673861d
Signed-off-by: Veera Vegivada <quic_vvegivad@quicinc.com>
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
 2025-04-16 11:14:57 +05:30
QCTECMDR Service
cd38f518ce Merge "ARM: dts: msm: Add support for debug info for monaco" 2025-04-15 20:43:05 -07:00
Kavya Nunna
5887bcc216 ARM: dts: msm: Add ldo-ocp-notifier support for kera 
Add ldo-ocp-notifier support for kera platforms.

Change-Id: I6aac9f6faeda06152647cdb56dc2064eca4a64a6
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2025-04-15 02:21:48 -07:00
Saranya R
6833986c6f ARM: dts: msm: Add support for debug info for monaco 
Reserve debug info region of 4KB for monaco.

Change-Id: I9481c9862838cd754a063a351dd02578d2b3dd2f
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
 2025-04-14 03:00:49 -07:00
Asit Shah
2072106de1 ARM: dts: msm: Add smem and syscon support for SM6150 
Added smem, syscon and dependent nodes for SM6150.

Change-Id: Icb9485e46c8720919310bc0e2560bd51b23f5dec
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
 2025-04-14 13:56:42 +05:30
Kunal Singh Ranawat
b5604a5ff7 ARM: dts: msm: Add tlmm pinctrl support for SM6150 
Add support for TLMM pinctrl on SM6150 platform.

Change-Id: I45dfd3d84900ed4b24ecda47462c2c5178bbb02f
Signed-off-by: Kunal Singh Ranawat <quic_kranawat@quicinc.com>
 2025-04-14 13:55:48 +05:30
Asit Shah
dacefe38a6 dt-bindings: arm: Add bindings for sm6150 llcc 
Add bindings for sm6150 llcc node.

Change-Id: I4f239f190c01110e59c1081ccf0a57cb1631fb95
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
(cherry picked from commit 4173e882bd59e39d8b698fed8b92417231c98e4e)
 2025-04-13 23:54:42 -07:00
Bao D. Nguyen
7c24cb15cb ARM: dts: msm: Add SD card LS external feedback clock support 
Add the Level Shifter's external feedback clock entry to support
the SD card HS50 mode running at 50MHz.
By default, the Sun platforms use the Level Shifter devices with
external feedback clock signal connects back to the MSM in order
for the HS50 mode to work at 50MHz. Without the external feedback
clock, the HS50 mode works at reduced frequency at 37.5MHz.

Change-Id: I56c61411d7f792a389fa85661fce7fa5074e2c9f
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
 2025-04-10 13:05:42 -07:00