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24 Commits

Author SHA1 Message Date
Yuanfang Zhang
1a2eeaae79 ARM: dts: msm: change compatible of ETM on Sun 
Change compatible of ETM to "arm,coresight-etm4x-sysreg" to use sysreg
access on Sun.

Change-Id: Ie7fbc759a96e0fb4fbe87c7f5467d301cef3405d
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-02-05 14:09:41 +08:00
Yuanfang Zhang
f5a7a87a21 ARM: dts: msm: disable turing dpm1/dpm2 tpdm on sun 
Disable turing dpm1/dpm2 tpdm because some clocks can not be enabled
from kernel side.

Change-Id: I4c51b3dbfdba44f843617e788ccd7c7d559646fc
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-02-04 14:47:34 +08:00
Yuanfang Zhang
2e2a02bcd7 ARM: dts: msm: disable gfx funnel on sun 
"coresight-gfx-funnel" needs to be disabled by default, it will be enable
from GFX DT side.

Change-Id: I041fe3e3d43b1880147826d757029118da24cf24
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-01-25 11:09:57 +08:00
Yuanfang Zhang
9bea8a39e3 ARM: dts: msm: disable ufs/ddr-shrm/ddr-dpm tpdm on sun 
Disable ufs/ddr-shrm/ddr-dpm tpdm on sun because related clocks are not
able to enable from kernel side.

Change-Id: I70c72d681150720df594de22f2cbb0a108b1ee88
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-01-19 01:54:09 -08:00
Yuanfang Zhang
0e1b3b9b18 ARM: dts: msm: add gpu funnel for sun 
Add gpu funnel to support CX DBGC and GX DBGC trace.

Change-Id: I8658a657aa83d1338329dda3108d982e591e6a92
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-01-05 00:15:58 -08:00
qctecmdr
02cb2f0759 Merge "ARM: dts: msm: correct the address for etf0_ncc0 on sun" 2024-01-04 21:48:11 -08:00
Yuanfang Zhang
e5db249fc2 ARM: dts: msm: correct the address for etf0_ncc0 on sun 
Correct the base address for etf0_ncc0 on sun.

Change-Id: Ic78f394c3cf3895854c6e9ae5480f73760825f72
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-01-03 21:48:24 -08:00
Yuanfang Zhang
fd6a064c67 ARM: dts: msm: disabled cti shrm 
Disable cti shrm because kernel do not have access to it on external build.

Change-Id: Ia225f325a929aeeba56a38dd1c627d735aaf6a56
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-01-02 23:15:06 -08:00
qctecmdr
e75b6b24af Merge "ARM: dts: msm: add tgu for ipcb/spmi on sun" 2024-01-01 22:28:02 -08:00
qctecmdr
03520928a7 Merge "ARM: dts: msm: correct msr register size on sun" 2024-01-01 22:28:02 -08:00
Yuanfang Zhang
ceda8efbe8 ARM: dts: msm: correct tpdm-dpm1/2 type on sun 
Correct tpdm-dpm1/2 type from static to standard type.

Change-Id: Ia824cc10bf067c849c6286df6094bde6962ac30b
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-12-25 14:35:57 +08:00
Yuanfang Zhang
f82fac6ae3 ARM: dts: msm: add tgu for ipcb/spmi on sun 
Add tgu node for ipcb and spmi0/1 on sun.

Change-Id: Ia4468b846f64b8812ac43e4d2aeb31a223dea64f
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-12-22 01:30:46 -08:00
Yuanfang Zhang
35e3460d12 ARM: dts: msm: correct msr register size on sun 
Correct msr register size to 0x78 on sun.

Change-Id: I495c13c6a41fad25ccedae29927daba00a68aaa1
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-12-20 22:45:31 -08:00
Yuanfang Zhang
282f80db31 ARM: dts: msm: enable turing tpdm dpm1/2 on sun 
Enable turing tpdm dpm1/2 and change their type to static tpdm.

Change-Id: I775e3291ea838ad228383727e8e669d7bb9db8b6
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-12-20 18:09:17 -08:00
qctecmdr
e2006ce2db Merge "ARM: dts: msm: correct name of ext_cmb/turing/gcc tpdm on sun" 2023-12-14 05:36:12 -08:00
qctecmdr
d5ba507877 Merge "ARM: dts: msm: add coresight gladiator for sun" 2023-12-06 18:16:00 -08:00
Yuanfang Zhang
870a04eeb3 ARM: dts: msm: correct name of ext_cmb/turing/gcc tpdm on sun 
Correct name of tpdm ext_cmb/gcc/turing/tmess, add tpdm ddr-shrm
and ddr-dpm, fix replicator-uc0/1 probe fail issue.

Change-Id: I90566cef447ebdd682cbcee5e82e9cc20dd318b0
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-12-06 08:36:18 -08:00
Yuanfang Zhang
4a2663c641 ARM: dts: msm: add coresight gladiator for sun 
Add coresight gladiator node for sun.

Change-Id: Ib8bc940af6c50ac83c4687d63657de7fe36f2ad2
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-12-01 02:56:28 -08:00
Yuanfang Zhang
dd56609d88 ARM: dts: msm: disable tpdm pcie-rscc and spss on sun 
Disable tpdm pcie-rscc and spss because some related clk can not
be enabled from kernel side.

Change-Id: I17d393c5ccf757198632eba15f133aae0182a05e
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-11-28 03:07:00 -08:00
Yuanfang Zhang
670888549f ARM: dts: msm: enable core etm on sun 
Enable core etm related components and some TPDMs and CTIs.

Change-Id: I1d7a581a9aad1bc4486685ae9b25a3323c53811d
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-11-21 03:21:58 -08:00
Yuanfang Zhang
e46c335e2d ARM: dts: msm: disable tpdm ddr-ubwcp on sun 
Disable tpdm ddr-ubwcp, because the clocks associated with it are
not enabled.

Change-Id: I4bebde68995bc9831c067ca25978fae858b7536c
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-11-16 18:37:19 -08:00
Yuanfang Zhang
ec1e4e821d ARM: dts: msm: rename node name for modem-diag on sun 
Rename node name for modem-diag node and add memory-region
for modem-etr1 on sun.

Change-Id: I8430a422d3b2bbb2ea7ecd489b675bd946ef29c1
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-11-08 05:53:20 -08:00
Yuanfang Zhang
ee8776d01b ARM: dts: msm: add uetm/cti/qmi node for sun 
add uetm/cti/qmi device tree configuration on sun.

Change-Id: I7fde13b226eac500f46865aeed6b337105b1dffd
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-10-25 08:30:14 -07:00
Yuanfang Zhang
2964e2edd2 ARM: dts: msm: add coresight component DT file for sun 
Add coresight component devicetree file for sun.

Change-Id: I28b8b6a2142fc89ed457553f039eca785064007b
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2023-09-19 23:21:39 -07:00