Although this is already present in CONFIG_CMDLINE in gki_defconfig, it
appears to be being overridden by the commandline specified in devicetree.
Change-Id: If61b4cfd11a15a7c36fb01875b7c77ac7c5bde8b
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Setting dma32_disable causes all memory to be placed in ZONE_NORMAL,
and reduces overhead in page allocation.
Change-Id: I770fe2688081b457a121afd23d6d924423680e5f
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add 4.5 MB for use by minidump_memory driver.
Add 2 MB for use by memshare IMS usecase.
Change-Id: I5f3897e24dd4b7a1c7bd3f883c4837eaa3ca384a
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Fix the interrupt line for wdog INT to EDGE triggered.
Change-Id: Id9ca3f3a632b95bfa17cedacda0936845413ded1
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
qcom,ramoops driver takes memory dynamically
available from a given range and give it to
ramoops for its usage.
Change-Id: I94ece0f9d25719e240ecb5c7f47a3b1fe83fbab1
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Loadable section memory of FingerPrint(FP) Sensor TA
has to be increased which requires increase in qseecom_ta mem.
Change-Id: Ie0a31662cd7b05f3aff0a41c275089ed7684d8b0
Signed-off-by: Akhil Budampati <quic_abudampa@quicinc.com>
Removed SP PBL Patch Version Register from sun dtsi
since it is no longer used.
Change-Id: I52b28ed1a07676188a39c09b72c0e2364cfc0ac2
Signed-off-by: Magesh M <quic_murugan@quicinc.com>
Add device nodes to configure PDP mailbox and add support
for PDP logging on both PDP cores.
Change-Id: I2393334d33373df3447f5140cc66cd7624faf0cd
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Mark GCC clock node as GenPD provider and disable the
PCIE GDSC regulator nodes.
Change-Id: I98fc6709592c393259da77443d4b6e580e61a0b8
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Mark dispcc clock node as GenPD provider and disable the
display GDSC regulator nodes.
Change-Id: I91cf788254ca0bd78a02dc4b196745da380fb74b
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Mark videocc clock node as GenPD provider and disable the
video GDSC regulator nodes.
Change-Id: I206ad77302fa8ece5b4efe28e20d8c1c23d9fac7
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Adopt the upstream ufs bus voting implementation using
commit <03ce80a1bb8>
("scsi: ufs: qcom: Add support for scaling interconnects").
With this implementation, the Qualcomm's bus voting parameters
are moved to the driver source code. As a result, remove the bus
voting DT entries here.
Change-Id: I6366fe76fba4022cbd97bb757eaac2183274bcd2
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
The upstream linux community has added a devicetree property
"iommu-addresses", which describes to the DMA api what IOVA
addresses a device can/cannot use. So we replace “qcom,iommu-
dma-addr-pool” by “iommu-addresses” since kernel 6.5 to follow
upstream.
Change-Id: If18f14d6cb13aa2ed67c1417295fc30723b0c932
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
has added a devicetree property "iommu-addresses", which
describes to the DMA api what IOVA addresses a device
can/cannot use. So we replace “qcom,iommu-dma-addr-pool”
by “iommu-addresses” since kernel 6.5 to follow upstream.
Change-Id: I9c99fc931fa9a59a472f371bfb59f615f83539f4
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
This device is necessary to notify the scheduler about CPU thermal
pressure.
Change-Id: Ibf1e636dfee32ab8b7c3b9202264603d638c577a
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Add ftrace_dump_on_oops in kernel cmdline to enable capture
of ftrace in minidump for pineapple/sun SoCs.
Change-Id: I1d07d01dbd5f4240f12eba53a252ec8941262623
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Required to vote BW through the display SW client.
Change-Id: I7b49a3e1f9f47dd7634d390b46a5ebd135958bee
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
There are 6 SW DRV IDs supported for display. Update same.
Change-Id: I5a58e7e81884e5201ef218f4418204aeed47e5ac
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Add common iommu group for WCNSS and ADSP for direct
link use case.
Change-Id: I031283713b4f89176d574580f5b11d44f870a0ca
Signed-off-by: Yeshwanth Sriram Guntuka <quic_ysriramg@quicinc.com>
According to the camera team, this is required due to camera hw
architecture changes on sun.
Change-Id: Iaba200c194f9758cd506cd871bd4c4853542c028
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Update cpucp device to include reg-names property.
Change-Id: I78d9d386971952511f66f455857adcc8ea9edf58
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Added SP PBL Patch Version Register to read the SP-PBL
patch version to handle SPSS attach timed out scenario.
Change-Id: Id7ee4df5d09d9c09410bc24fc475ee2a36fca246
Signed-off-by: Magesh M <quic_murugan@quicinc.com>
Add dtsi entry for ssip fuse configuration on Sun platform.
Change-Id: I1f6dbc9608db1e29aef1d9699820eb1e1d3c9299
Signed-off-by: Ping Li <quic_pingli@quicinc.com>
We need to override the PCIe SM PWR_CTRL and PWR_CTRL_MASK
registers so that CXPC can happen when pcie driver is not probed.
Without this change, CXPC will be blocked when the pcie driver is
not probed as there will be no notification from PCIe SM entity to
allow CXPC. Once we these registers are written 0x1, no one will
wait for PCIe SM to allow CXPC.
Change-Id: I8d1542deb4fcc10849c848aa73718a47af556719
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Make changes to enable SMEM Mailbox SMP2P nodes for sun to
communicate with modem.
Change-Id: Iea261c8f42768c05eec7caf62adcd1dcc93cd950
Signed-off-by: Tyler Wear <quic_twear@quicinc.com>
Update to memory map v4.
Additionally, sort hwfence-shmem and tz_merged_region in ascending order.
Change-Id: Ia45a28a1f0f0025cad0c947d19f2c27dcf94516a
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
CRMV regs have status captured for various commands/voltage levels.
Map CRMV registers in device so that driver can dump them when required.
Change-Id: I05911a0646b2317f90fd425e172d0458ce669ab0
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
Tmecrashdump ddr offset is per target defined value and is needed as an
input to tz-log driver to display tme logs in userpace.
Add support for sun.
Change-Id: I58584a0660f489299522c658b984370d800a8143
Signed-off-by: Kuldeep Singh <quic_kuldsing@quicinc.com>
