Add display mx clock controller bindings on sun device.
Change-Id: Ie8c87b285bdf5278585bfee42b0eeff70397ce9d
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Add idle states for CPU and CPU clusters, add PSCI device to
enable CPU to enter LPMs.
Additionally, update APPS RSC device to be in cluster power
domain to handle RSC activites when cluster is powering off.
Change-Id: Ibe2fa720bc5e81084d380b2e5dc4f8fa8910566c
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Add proxy enable properties to the DSI core and panel supplies
to support continuous splash for Kera.
Change-Id: Iac767f1f9fd51159ec9650370ab7caa0a6e695a5
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Kera IoT platform required pcie_1 clocks support. Add support
to model pcie_1 clocks and gdsc's for Kera IoT devices.
Change-Id: I5ada397442568c9e91b099e8cb4ea5234fb4b76e
Signed-off-by: Smeet Raj <quic_smeeraj@quicinc.com>
eUSB2 HPG revision 1.0.2 recommends to program eusb register
USB_PHY_CFG_CTRL_1 to be programmed to 0x00 on phy init.
Since this divergence is only applicable for specific version therefore
updating the override sequence with the appropriate value.
Change-Id: Iaf84875c20e9c2c030b3f81eec9348a63f081105
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Add compatible string to schgm-flash DT node. This was removed
from the bulk DT porting for Ravelin on qcom-6.6 device-tree branch.
Change-Id: I16d410ce8cc15278b0d8a3480a1e7fd5a044669f
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
This change will add usb-role-switch and eud in Kera.
Change-Id: I74ca8c0e19b45d925bcecc78e993439441339e20
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
To support cable detection events from UCSI, updates need to be made
to enable usb role switch and setting up a connection to the UCSI PMIC
glink node.
Change-Id: Ic3a848f882072a766b3efb872f943dd3f4220ba1
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
DWC3 host and XHCI plat now communicates the maximum number of interrupters
the XHCI HCD will allocate. Since platforms only require a limited number
of interrupters (i.e. 3) make sure XHCI doesn't allocate more than is
required.
Change-Id: I466748df07aba6d7bdc79c7b2b17b3a57c58d3d4
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
During Airplane mode testing with BT, UWB and PCIE concurrent
test scenarios, due to pcie traffic signal tolerance issue seen
on q2spi signals. As per the recommendation from design team
decreasing current drive strength from 6mA to 4mA for q2spi
active state GPIO configuration.
Change-Id: I530dfd636e834c4d6eb1e067e8dcb76dcfa4ab87
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
Enable QoS programming for kera and add necessary AXI and
AHB clock handles for programming QoS for USB, IPA and PCIE masters.
Change-Id: I51bcc6a841005b6daf8ab3f22a79e6704dc3b3ed
Signed-off-by: Swetha Chintavatla <quic_chintava@quicinc.com>
Add USB AXI clock handle for accessing USB QoS register to program QoS.
Change-Id: I4e0a0057e55283578ab6333f0da1b46c36e01fe5
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Provide separate file for SLT so that ABL can pick
it properly. Currently, ABL doesn't check if multiple
board-id is added.
Change-Id: I9140ca7b19f6b0b368798950145abbe28e32e778
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
