Commit Graph

1870 Commits

Author SHA1 Message Date
Patrick Daly
5a1d998abd dt-bindings: Document qcom,initial-movable-zone-size property
This property describes how large of a movable zone should be created
when the virtio_mem device probes.

Also, fix all errors reported by make dt_binding_check.

Change-Id: I487ad7592d54021ddbb3caddb20774d3e076c766
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-08-05 16:27:18 -07:00
Patrick Daly
942e7f19e7 ARM: dts: msm: Fix dependency between virtio-mem and mem-buf-msgq
The virtio-mem device has always had a dependency on mem-buf for plugging
in memory. Previously, the ordering was not a concern, since hotplug was
not done until userspace was up. However, in subsequent patches we
will instead hotplug in memory as soon as the virtio-mem device probes.

Change-Id: I9c4e4728a15ab32d65ffaea0ba2681a816a4abf0
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-08-05 11:40:04 -07:00
QCTECMDR Service
dba669a7e0 Merge "ARM: dts: qcom: Add aoss, aop and tme nodes for kera" 2024-08-03 00:05:08 -07:00
QCTECMDR Service
494a19a4ca Merge "ARM: dts: qcom: Add 3.5mm with Kiwi WLAN for MTP platform" 2024-08-02 21:13:26 -07:00
QCTECMDR Service
c0808eafeb Merge "ARM: dts: msm: ravelin: remove atomic in secure use case for ravelin" 2024-08-02 18:18:38 -07:00
QCTECMDR Service
c78f5dc38c Merge "ARM: dts: qcom: Update bootargs for parrot and ravelin" 2024-08-02 18:18:38 -07:00
QCTECMDR Service
67d061eb7d Merge "ARM: dts: msm: ravelin: Add msgq-names property for ravelin" 2024-08-02 18:18:38 -07:00
QCTECMDR Service
9cf9e56a8a Merge "ARM: dts: msm: Add compatible for CPUFREQ HW DEBUG node on MONACO" 2024-08-02 10:56:40 -07:00
Prakash Yadachi
20818089ae ARM: dts: qcom: Update bootargs for parrot and ravelin
Removed console=ttyMSM0,115200n8 form bootargs for
parrot and ravelin targets.

Change-Id: I7b1c942343e71e809d234800f7ea6d6469a4c306
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
2024-08-02 04:55:14 -07:00
Srinivasarao Pathipati
5f6d4987b1 ARM: dts: msm: ravelin: remove atomic in secure use case for ravelin
Atomic and secure domains are not a legal combination so remove
atomic entry for secure use case.

Change-Id: Ibd163da686e0d982dcb085ab32d4f01cdb4fcf69
Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
2024-08-01 16:20:52 +05:30
Srinivasarao Pathipati
69ee6cf4c7 ARM: dts: msm: ravelin: Add msgq-names property for ravelin
The commit 39dd329a019b ("mem-buf-msgq: Support multiple msgqs")
mandates to have 'msgq-names' property in node 'mem-buf-msgq'.
Adding default msgq entry to fix probe failure.

Change-Id: I9dc802604cabff1b808c08302e1b77bf61fd7b3f
Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
2024-08-01 03:42:42 -07:00
QCTECMDR Service
89835d05e2 Merge "dt-bindings: Add new bindings for platform MPAM" 2024-07-31 22:00:46 -07:00
QCTECMDR Service
a860d465c6 Merge "ARM: dts: msm: Enable memmap_on_memory on arm64 on sun-vm" 2024-07-31 10:10:15 -07:00
QCTECMDR Service
1efaf82eaf Merge "ARM: dts: msm: Add shutdown ack for each remoteproc processors" 2024-07-31 02:21:33 -07:00
QCTECMDR Service
ea9d62622e Merge "ARM: dts: msm: Add smem nodes for kera" 2024-07-30 21:02:58 -07:00
QCTECMDR Service
6f00fb2dd7 Merge "ARM: dts: msm: Remove unused SW DRVs for disp_crm device for sun" 2024-07-30 21:02:58 -07:00
Huang Yiwei
7a4a207629 dt-bindings: Add new bindings for platform MPAM
Add new bindings for platform MPAM.

Change-Id: I311a902e3135c5a825dcf4d6446d578489498b66
Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
2024-07-31 10:29:56 +08:00
Huang Yiwei
b7ca0a4904 dt-bindings: Add new bindings for CPU MPAM
Add new bindings for CPU MPAM.

Change-Id: I856a137958140d1bc34cdfeadf5ddda4030a5c62
Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
2024-07-31 10:17:55 +08:00
Maulik Shah
d139cd2e2d ARM: dts: msm: Remove unused SW DRVs for disp_crm device for sun
Remove unused SW DRVs as keeping them makes them register
with IRQs and leading to spurious IRQs.

Change-Id: Iba8723b7ac734286668158fe793bde97f3f31eda
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2024-07-30 03:01:37 -07:00
Kamal Wadhwa
781cb25b20 ARM: dts: qcom: Add NVMEM cells FMD_CNT2_STOP & FMD_CHG_PON for PMK8550
Add NVMEM cells FMD_CNT2_STOP and FMD_CHG_PON for supporting
Find-My-Device(FMD) feature.

- FMD_CNT2_STOP controls the number of FMD cycles after which the
feature will auto disable to save power in OFF mode.

- FMD_CHG_PON can be use to disable USB PON feature for testing
purpose.

Change-Id: I0f217d413f2ec8c5616956c4e56fd7e469c52d56
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
2024-07-29 11:11:01 -07:00
Mukesh Ojha
eb19dd58e0 ARM: dts: msm: Add shutdown ack for each remoteproc processors
legacy SoCs had shutdown ack only available to modem DSP
since waipio, it is even available for ADSP and CDSP and since
we are adding shutdown ack timeout which would wait for these
ack interrupts. Let's add them for ADSP and CDSP as well.

Change-Id: I75c427be29d8d762617ccc1e595929edb9ff2c3b
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-07-29 14:37:44 +05:30
Imran Shaik
adef50b937 ARM: dts: msm: Add compatible for CPUFREQ HW DEBUG node on MONACO
Add compatible string for CPUFREQ HW DEBUG node on MONACO platform.

Change-Id: Ib9e7b96e3cc0a0b5ffb779d8d7e5f47034f30325
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
2024-07-29 10:52:59 +05:30
Pranav Mahesh Phansalkar
9b090db434 ARM: dts: qcom: Add aoss, aop and tme nodes for kera
Add devicetree nodes to enable qmp communication with aop and tme.

Change-Id: I4e30e6854fcb1d29ea3733d9d59bb01acfe6667b
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
2024-07-27 09:44:57 +05:30
QCTECMDR Service
cc94cac107 Merge "dt-bindings: clock: Add cpufreq debug hw bindings" 2024-07-26 11:57:26 -07:00
QCTECMDR Service
150227040d Merge "ARM: dts: msm: Uncomment compatible string for PMIC drivers" 2024-07-26 11:57:26 -07:00
QCTECMDR Service
d1a2def8f0 Merge "ARM: dts: msm: Define max no.of XHCI interrupters for parrot" 2024-07-26 05:50:31 -07:00
QCTECMDR Service
d0cd45facd Merge "ARM: dts: msm: Add support for graphics clock controller on TUNA" 2024-07-26 01:24:45 -07:00
Pranav Mahesh Phansalkar
7d4f9f859d ARM: dts: msm: Add smem nodes for kera
Add smem nodes for kera SoC.

Change-Id: Icaa26bfe01227bc21e0e3bce324779834f204e68
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
2024-07-26 12:22:26 +05:30
QCTECMDR Service
ecefde49d6 Merge "ARM: dts: msm: Map llcc gold bwmon as non-early for sun" 2024-07-25 21:43:50 -07:00
QCTECMDR Service
f1e01feb97 Merge "dt-bindings: clock: qcom: add CAMCC and CAMBISTMCLKCC bindings on tuna" 2024-07-25 21:43:50 -07:00
QCTECMDR Service
aeffe232df Merge "ARM: dts: msm: Add fast entry in sun" 2024-07-25 21:43:50 -07:00
Saranya R
388c7d4765 ARM: dts: msm: Define max no.of XHCI interrupters for parrot
DWC3 host and XHCI plat now communicates the maximum number
of interrupters the XHCI HCD will allocate. Since platforms
only require a limited number of interrupters (i.e. 3) make
sure XHCI doesn't allocate more than is required.

Change-Id: I9f22a477377873284f1d69fe98c9a466ce237184
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
2024-07-25 14:42:40 +05:30
Prerna Singh
1a7000b6f3 dt-bindings: clock: Add cpufreq debug hw bindings
Add bindings for qcom-cpufreq-hw-debug controller.

Change-Id: I4b388687d51f5c142fa4e3ba17ac3e038b966c2a
Signed-off-by: Prerna Singh <quic_prersing@quicinc.com>
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
2024-07-25 12:09:02 +05:30
QCTECMDR Service
47753bb575 Merge "ARM: dts: msm: Mention class cpus as cpu phandles for sun/pineapple" 2024-07-24 01:49:20 -07:00
QCTECMDR Service
d8ac094241 Merge "dt-bindings: clock: qcom: add GCC and TCSRCC bindings on KERA" 2024-07-24 01:49:20 -07:00
Ajit Pandey
c349cbd563 dt-bindings: clock: qcom: add CAMCC and CAMBISTMCLKCC bindings on tuna
Add camera and cambistmclk clock controller bindings on tuna device.
While at it, fix existing yaml documentation for dtbs failure.

Change-Id: I8484292fe7336f1bdd4d018e1a342da04148efd1
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
2024-07-24 13:58:19 +05:30
Lingutla Chandrasekhar
6d5d8319b0 ARM: dts: msm: Add fast entry in sun
Add CPUCP fast device tree entry to get mailbox channel id and cpus to
be controlled with fast.

Change-Id: Ibfc2db806adf97985bf3921fac1244032749d61a
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
2024-07-23 23:40:53 -07:00
Lingutla Chandrasekhar
0289936a74 dt-bindings: soc: add qcom,cpucp_fast documentation
Add documentation for the device qcom,cpucp_fast, which is used
for handling system hints from firmware.

Change-Id: I2336051df317d09d5224244e2d8248242980cc18
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
2024-07-23 23:40:46 -07:00
QCTECMDR Service
3e97ccc2ee Merge "ARM: dts: msm: add remote debugger support" 2024-07-23 21:34:33 -07:00
QCTECMDR Service
ca51b8d528 Merge "dt-bindings: soc: qcom: Add non-early mapping to bwmon bindings" 2024-07-23 21:34:33 -07:00
Patrick Daly
aeb4dbdd4c ARM: dts: msm: Enable memmap_on_memory on arm64 on sun-vm
Memmap_on_memory changes the behaviour of memory hotplug to reserve
the first X Mb of a memory block for the struct page array. On arm64,
the size of the struct page array for a 128Mb memory block is 2Mb.
However, the memory-hotplug code requires X to be pageblock aligned (4Mb).

memory_hotplug.memmap_on_memory="force" informs the memory-hotplug core
to round up the size of the memory reserved for struct page array to
meet this 4Mb requirement, even though only 2Mb will actually be used.

This is preferred over allocating the struct page array from ZONE_NORMAL
because adding additional memory into ZONE_NORMAL is not supported on
this target.

Change-Id: I9544b58c202cecddbe80be67a24a1115b162e478
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-07-23 21:07:09 -07:00
QCTECMDR Service
89800220a4 Merge "ARM: dts: msm: Enable the SPMI node and add node its documentation" 2024-07-23 15:52:17 -07:00
Amir Vajid
c831e5e8c5 dt-bindings: soc: qcom: Add non-early mapping to bwmon bindings
Update bwmon bindings to include support for non-early memory
mapping.

Change-Id: I4f45ea0fd3f219325463d832c958ebd900f15f1c
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
2024-07-23 17:22:34 +05:30
QCTECMDR Service
62da18f4a4 Merge "ARM: dts: msm: disable movable zone for parrot and ravelin" 2024-07-23 01:13:24 -07:00
Anaadi Mishra
40aa1b3eb7 dt-bindings: clock: qcom: add GCC and TCSRCC bindings on KERA
Add GCC and TCSRCC clock bindings on kera platform.

Change-Id: I29f71b82ea76855a068ce26682037ae6095255e5
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
2024-07-23 12:04:06 +05:30
Mukesh Ojha
8e39e7601f ARM: dts: msm: Mention class cpus as cpu phandles for sun/pineapple
Remove the hard coded class cpus and replace them with their
phandles.

Change-Id: I283ac79d64d945e12477f61a67b058574bde7031
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-07-22 22:40:36 -07:00
Devender Kaushik
15556562b8 ARM: dts: msm: add remote debugger support
Add remote debugger device configuration. The Remote Debugger driver
allows a debugger running on a host PC to communicate with a remote
stub running on peripheral subsystems.

Change-Id: I6513c219a4d3a50f0c0723036bd7387da3558477
Signed-off-by: Devender Kaushik <quic_dkaushik@quicinc.com>
2024-07-23 10:39:32 +05:30
QCTECMDR Service
f4be45d558 Merge "ARM: dts: msm: Add glink probe entry for Sun" 2024-07-22 15:45:25 -07:00
QCTECMDR Service
35efc06202 Merge "ARM: dts: msm: save 2M vmemmap of memory on sun" 2024-07-22 15:45:25 -07:00
Akshay Gola
c8ce3e1b00 ARM: dts: msm: Enable the SPMI node and add node its documentation
Enable SPMI  node and add its documentation for bring-up.

Change-Id: I6ddfb75c6ba03935a5c8338f859147ea676205dd
Signed-off-by: Akshay Gola <quic_agola@quicinc.com>
2024-07-22 11:53:01 +05:30