Fix for pmic glink node for ravelin without this change glink
channel registration fails for the ADSP communication.
Change-Id: I02d1ea7b11db6e5e5dfd0f85e384797b1b6b96b9
Signed-off-by: Akhil Manikoth Kallankandy <quic_c_akhika@quicinc.com>
Remove the qcom,msm_fastrpc nodes as these
are moved to dsp-devicetree.
Change-Id: I2ae6d3d27b27895859c4f1e241012d288f5f7a72
Signed-off-by: Akhil Manikoth Kallankandy <quic_c_akhika@quicinc.com>
Ravelin target doesn't support IO coherency.
So, remove the coherent property from storage nodes.
Don't vote for voltage for regulators shared between eMMC and UFS to be
in consistent with UFS design where regulator-min-microvolt and
regulator-max-microvolt properties are removed from regulator device
tree files for UFS regulators and to avoid below regulator API failures.
[3.198613] pm6450_l24: unsupportable voltage range: 2960000-0uV
[4.236846] sdhci_msm_vreg_set_voltage: regulator_set_voltage(vdd)failed.
min_uV=2960000,max_uV=2960000,ret=-22.
Change-Id: I780218b0903887e36589704af3e790a710932dd7
Signed-off-by: kamasali Satyanarayan <quic_kamasali@quicinc.com>
SPM feature is deprecated from 5.15 kernel. So remove
events specific to SPM feature for Ravelin.
Change-Id: Idbcbbd6f3736ad19cb1b0ea479809548a020195d
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add nodes to enable scmi communication to cpucp on ravelin.
Update tx and rx regname for cpucp.
Change-Id: I9674a974e58d8be1eb02063846f5e9e0d1b046c6
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add initial device tree support for ravelin target.
This is a snapshot of dtsi files as of KP.1.0
'commit <370d8eab7cc6> ("Merge "ARM: dts: qcom:
Disable cnss-kiwi SOL on anorak platform"")'.
Modified as per compilation and bootup.
Change-Id: Icb9a6e67879c68dbf894d1713fa2837882b9f00c
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
