Commit Graph

1869 Commits

Author SHA1 Message Date
QCTECMDR Service
fa82bbacb8 Merge "ARM: dts: msm: Add qcom,force-low-pwm-size prop for ravelin pm6450" 2024-07-09 16:58:32 -07:00
QCTECMDR Service
11c46b34ca Merge "ARM: dts: msm: Use "iommu-addresses" property for ravelin dwc3" 2024-07-09 16:58:32 -07:00
QCTECMDR Service
4a433fcfd2 Merge "ARM: dts: msm: Add initial SMMU configuration for tuna" 2024-07-09 16:58:32 -07:00
QCTECMDR Service
4dd684956d Merge "ARM: dts: qcom: update gpu mitigation for bcl for sun" 2024-07-09 13:25:46 -07:00
QCTECMDR Service
0ce0b2ec09 Merge "ARM: dts: msm: Remove fastrpc nodes for monaco" 2024-07-09 13:25:45 -07:00
QCTECMDR Service
22f2df78be Merge "ARM: dts: qcom: Add scm, syscon,shmbridge support in Kera" 2024-07-09 13:25:45 -07:00
QCTECMDR Service
3a53bb2e2c Merge "ARM: dts: msm: Remove ipa nodes for monaco target" 2024-07-09 13:25:45 -07:00
QCTECMDR Service
72b5e3c533 Merge "dt-bindings: bridge: lt9611uxc: Add bindings" 2024-07-09 13:25:45 -07:00
Dmitry Baryshkov
183bc36233 dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings
Add generic bindings for the Qualcomm variant of the ARM MMU-500. It is
expected that all future platforms will use the generic qcom,smmu-500
compat string in addition to SoC-specific and the generic arm,mmu-500
ones. Older bindings are now described as deprecated.

Note: I have split the sdx55 and sdx65 from the legacy bindings. They
are not supported by the qcom SMMU implementation. I can suppose that
they are using the generic implementation rather than the
Qualcomm-speicific one.
[Add dt-bindings for qcom,smmu-500 for Qcom SoCs].

Change-Id: Id2520441f556590403ac712f68aa7487ca4f205e
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-5-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
Git-Commit: 6c84bbd103d85696af9cc0f746c01f9b2847637e
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-10 00:05:02 +05:30
Rohit Agarwal
2fcde9c1b5 dt-bindings: arm-smmu: Add SDX75 SMMU compatible
Add devicetree binding for Qualcomm SDX75 SMMU.

Change-Id: I393b6ac159f71fdd24cfaa665ccda0271b7531b5
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/1684487350-30476-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
Git-Commit: 48989c0b25ca6ed75f3ea81053936ff0b64d02e7
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-09 23:51:28 +05:30
QCTECMDR Service
d205719b87 Merge "ARM: dts: msm: Enable parade touch driver node" 2024-07-09 10:15:17 -07:00
QCTECMDR Service
a0de938f9e Merge "ARM: dts: msm: Add smp2p for tuna" 2024-07-09 10:15:17 -07:00
Rohit Agarwal
7497d82540 arm64: dts: qcom: Add SDX75 platform and IDP board support
Add basic devicetree support for SDX75 platform and IDP board from
Qualcomm. The SDX75 platform features an ARM Cortex A55 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, UART, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..
[Since we are not using sdx75-idp, do not include its DTS.]

Change-Id: I1562002758e7b077662c69d5d9bbef247aef157d
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-6-git-send-email-quic_rohiagar@quicinc.com
Git-Commit: 9181bb939984f1ad4f958c2be3ea10fd67344165
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-09 05:59:40 -07:00
Rohit Agarwal
635da2f7e4 dt-bindings: power: qcom,rpmpd: Add compatible for sdx75
Add a compatible string for power domains in sdx75.

Change-Id: I0c9cfc823f74e537e50737b225ebb44805e36788
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/1690803007-8640-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Git-Commit: 0b9d94e1f19acd19613386096d924af2333b620a
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-09 17:11:27 +05:30
Imran Shaik
e99a0b90c7 dt-bindings: clock: qcom: Add RPMHCC for SDX75
Add compatible string for qcom RPMHCC for SDX75 platform.

Change-Id: Id69e2e9dc2961f70624a63053002f8e16dcfce9e
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512122347.1219-4-quic_tdas@quicinc.com
Git-Commit: 379d72721bc4308fbc038e9858b7d2e9191725b5
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-09 14:18:27 +05:30
Rohit Agarwal
28e83f589e dt-bindings: pinctrl: qcom: Add SDX75 pinctrl devicetree compatible
Add device tree binding Documentation details for Qualcomm SDX75
pinctrl driver.

Change-Id: I0d8e959a3dd7e4eb71bf47c693130af5f87117fb
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1684425432-10072-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Git-Commit: 1dc3f8812cc5fe82c097811ea8251d7f8af5d54d
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-09 12:59:08 +05:30
Khaja Hussain Shaik Khaji
10aadf0941 dt-bindings: arm: qcom: Document sdxkova platform and boards
Document the sdxkova platform binding and also the boards using it.

Change-Id: Ifc488cf86c0113ce4df6140770b328851a786235
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-09 12:17:55 +05:30
Rohit Agarwal
60bbc15bb5 dt-bindings: arm: qcom: Document SDX75 platform and boards
Document the SDX75 platform binding and also the boards using it.

Change-Id: I821ae00b6c461ded39383bd8a3c131bb73c5914b
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-2-git-send-email-quic_rohiagar@quicinc.com
Git-commit: f9a97656ace80c617df2d6003c815877c026a9e3
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-09 12:07:57 +05:30
Minghao Zhang
3d7db74033 ARM: dts: qcom: Add fan thermal mitigation rules for SunP HDK
Add cpu0-0-0 zone's trip to make fan run at level 50.

Change-Id: Id3f38d165e513ec633f3a289cfddfc60284f8f7c
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
2024-07-09 14:24:39 +08:00
Cong Zhang
a3ac740d0d ARM: dts: qcom: Enable keep-running for OEMVM
Add keep-running property for OEMVM to let OEMVM shutdown gracefully
even if qcrosvm got killed.

Change-Id: I6b78f13f095ab8a3b068d94219b28cebbae2a75a
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
2024-07-08 19:49:03 -07:00
Rohit Agarwal
35d997d976 dt-bindings: cpufreq: cpufreq-qcom-hw: Add SDX75 compatible
Add compatible for EPSS CPUFREQ-HW on SDX75.

Change-Id: I7ebb70c2b05fa2c0abf70aff03302b3fc41f9419
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Git-Commit: dce13a235a356363faf9385ba34681d9fc689f1a
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-08 10:19:45 -07:00
Rohit Agarwal
66293a0212 dt-bindings: firmware: scm: Add compatible for SDX75
Add devicetree compatible for SCM present in SDX75 platform.

Change-Id: Ic1e101321cea49f2baf096bf57dcecc6b1c7ff17
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-3-git-send-email-quic_rohiagar@quicinc.com
Git-commit: 677b9e85e8691c0bddc35eebf6d01836e109e5f4
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-08 06:28:13 -07:00
Rohit Agarwal
0f1c118601 dt-bindings: interrupt-controller: Add SDX75 PDC compatible
Add device tree bindings for PDC on SDX75 SOC.

Change-Id: I261abde0a5905e8934727b4b251c068203b13612
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231117082829.609882-1-quic_rohiagar@quicinc.com
Signed-off-by: Rob Herring <robh@kernel.org>
Git-commit: ca41ae8f445e0bb88fa84584b451bfbf39b2e7f1
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-08 06:27:25 -07:00
Manaf Meethalavalappu Pallikunhi
ce671354ea ARM: dts: qcom: update gpu mitigation for bcl for sun
Update gpu mitigation for bcl for sun based on latest
recommendation.

Change-Id: Ieb25a08cc260252a6a71da954cb2b0e0879c35b1
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
2024-07-06 01:38:11 +05:30
Saranya R
f12b2d8069 ARM: dts: msm: Use "iommu-addresses" property for ravelin dwc3
Use upstream compatible DT property "iommu-addresses" instead
of "qcom,iommu-dma-addr-pool" for dwc3 which describes the
addresses that dwc3 cannot use.
Extend the address and size cells to ensure that IOMMU returns
a 32 bit address, in order to define a region that will block
0xf0000000--0xffffffffffffffff.

Change-Id: I211ba1b8bd1f7717f639d91dddb8adb86f17b42e
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
2024-07-04 21:40:20 -07:00
Vijayanand Jitta
ac1ca41e06 ARM: dts: msm: Add DMA-BUF heaps node for tuna
Add the DMA-BUF heaps node for tuna. This adds default
heaps like system and secure-system heap. Clients
can add their own DMA-BUF heaps in here.

Change-Id: I7b4d36250759e69248ec3fa371a4e5262885dc7f
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-07-04 07:57:15 -07:00
Prasad Arepalli
49adf9d13c ARM: dts: msm: Remove ipa nodes for monaco target
Disable ipa, gsi, rmnet and smp2p nodes for monaco target.
All the nodes are added in data specific dt files.

Change-Id: I8d0ead8276702aa3a03688b4b6b99630facac926
Signed-off-by: Prasad Arepalli <quic_parepall@quicinc.com>
2024-07-04 18:12:40 +05:30
Abhinav Parihar
9896d8515d ARM: dts: msm: Remove fastrpc nodes for monaco
Currently fastrpc dt nodes are present in main dt file.
With fastrpc driver migrating to upstream driver,rpc
properties will be overlayed out of kernel.

Change-Id: I91d915ae9ce7d55b5e81ff10d20eb7c370740172
Signed-off-by: Abhinav Parihar <quic_parihar@quicinc.com>
2024-07-04 03:57:30 -07:00
Lei Chen
f153d3a9d9 dt-bindings: bridge: lt9611uxc: Add bindings
Add bindings for lt9611uxc.
Display lt9611uxc bindings snapshot from msm-5.15 branch.
commit 0a979012e870("dt-bindings: bridge: lt9611uxc: Add bindings").

Change-Id: I43999e93004393cc7b14cc9735c15388c90b33ba
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
2024-07-04 15:37:04 +08:00
Mukesh Ojha
9aeef947f4 ARM: dts: qcom: Add scm, syscon,shmbridge support in Kera
Add a node for scm device and sysmon, shmbridge for Kera SoC.

Change-Id: Ied886250dba41209cac68cbe52498061bd6daf51
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-07-04 12:54:33 +05:30
Mukesh Ojha
49bf43396b ARM: dts: qcom: Add EUD node for Kera
Add EUD node in device tree to enable EUD driver
on Kera SoC.

Change-Id: I94aacb9b223b9935c78045bfc3de9179f3bf9871
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-07-04 12:33:10 +05:30
Naini Singh
7fab9d6a3d ARM: dts: msm: Add LLCC node for Kera SoC
Add LLCC node for Kera SoC.

Change-Id: Ib7cb07d1a36519dff7aa067da6fe54be2dafedfa
Signed-off-by: Naini Singh <quic_nainsing@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-07-04 12:13:07 +05:30
Naini Singh
e66dd43421 dt-bindings: arm: msm: qcom,llcc: Add compatible for Kera SoC
Add compatible string for Kera SoC.

Change-Id: If5b4edbea639c5720ddfbbfc2f98922f295126e2
Signed-off-by: Naini Singh <quic_nainsing@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-07-04 12:10:29 +05:30
Archana Sriram
e9b1f9d2ec ARM: dts: msm: Update iova-width for gfx tbu nodes for ravelin
Update iova-width property for gfx_0_tbu and
gfx_1_tbu nodes under kgsl-smmu for ravelin.

Change-Id: Ib43fa6ca8a66716b8604658413f05551e5b04826
Signed-off-by: Archana Sriram <quic_c_apsrir@quicinc.com>
2024-07-03 22:55:40 -07:00
Akshay Gola
81c3937e65 ARM: dts: msm: Enable raydium touch driver node
Enable raydium touch driver node and add its documentation
for bring-up.

Change-Id: I00a2d137d452959a555b13f38f971ce08d9173a8
Signed-off-by: Akshay Gola <quic_agola@quicinc.com>
2024-07-02 23:41:33 -07:00
Akshay Gola
029a884638 ARM: dts: msm: Enable parade touch driver node
Enable parade touch driver node and add its documentation
for bring-up.

Change-Id: I717186399283741c7c1957acc3319148b4d843f3
Signed-off-by: Akshay Gola <quic_agola@quicinc.com>
2024-07-02 23:40:41 -07:00
QCTECMDR Service
2e80498372 Merge "ARM: dts: msm: Adjust HS transmit amplitude for more coverage" 2024-07-02 15:59:25 -07:00
QCTECMDR Service
787d58765e Merge "bindings: Add bindings for FSA4480" 2024-07-02 06:45:15 -07:00
Saranya R
a78b0ff36e ARM: dts: msm: Use "iommu-addresses" property for ravelin qup
Use upstream compatible DT property "iommu-addresses" instead
of "qcom,iommu-dma-addr-pool" for qup which describes the
addresses that qup cannot use.

Change-Id: I8912ee5a256a15ed8e0cb729dd784bce4568c4fb
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
2024-07-02 06:11:50 -07:00
Udipto Goswami
a374335029 ARM: dts: msm: Adjust HS transmit amplitude for more coverage
Currently, it seems the HS transmit programmed isn't enough to
pass electrical compliance tests for all devices. Therefore
increasing it to 0xf (recommended by HW team) in order to
meet the passing marks.

Change-Id: I6609d6012e8ec6489c33af0a75873314a5b10e67
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
2024-07-02 04:55:06 -07:00
Pratham Pratap
bf0cfc08d4 ARM: dts: msm: update repeater override sequence on sun HDK
Update HS trasmit amplitude and Tx pre-emphasis for sun HDK platform.

Change-Id: I7f7c03ec19dc004d88ca00d53491f06f62ffb3ba
Signed-off-by: Pratham Pratap <quic_ppratap@quicinc.com>
2024-07-02 17:11:37 +05:30
Shilpa Suresh
4b335c6e90 ARM: dts: msm: Add qcom,force-low-pwm-size prop for ravelin pm6450
For backward compatibility for ravelin target, add
qcom,force-low-pwm-size property to limit setting PWM sizes to
6 and 9 bit modes only, rather than using the full 8 to 15 bit
PWM sizes range.

Change-Id: I3fdf12f49cec92cfb02ef994b6abbebbd29cc8e9
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
2024-07-02 15:55:29 +05:30
Soumya Managoli
fba395ddc1 bindings: Add bindings for FSA4480
This device is required for enabling USB-C analog support.

Change-Id: I2f7749a9562ef91f2c472bfeb8dfb1df145e1677
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>
2024-07-02 11:14:48 +05:30
QCTECMDR Service
88bc5613c2 Merge "ARM: dts: msm: Update parrot glink node" 2024-07-01 22:17:32 -07:00
QCTECMDR Service
057667bb21 Merge "ARM: dts: msm: Add smem nodes for tuna" 2024-07-01 05:53:14 -07:00
QCTECMDR Service
7ac8da066e Merge "ARM: dts: msm: monaco: Add qrng compatible" 2024-07-01 03:52:57 -07:00
QCTECMDR Service
e53aeec456 Merge "ARM: dts: msm: monaco: Add qseecom compatible" 2024-07-01 01:45:23 -07:00
QCTECMDR Service
5bbebe370d Merge "ARM: dts: msm: Remove qcom,msm_fastrpc from parrot.dtsi" 2024-07-01 01:45:23 -07:00
QCTECMDR Service
dbe5699e29 Merge "ARM: dts: msm: add ufs wrapped key support to parrot" 2024-06-30 23:19:27 -07:00
Pranav Mahesh Phansalkar
1566dc4a8e ARM: dts: msm: Add smp2p for tuna
Add the smp2p nodes for lpaidsp, modem, cdsp and soccp for tuna.

Change-Id: I465ddbfcb6e69a65b730e395e705e08bc75c5060
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
2024-07-01 11:33:04 +05:30