Increase dvdd initial voltage from 1.06v to 1.09v to avoid
voltage drop issue caused by IR on tuna QRD target.
Change-Id: I23bc8d44ec13260b9281e3c08968daa5e97fafb6
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add ulps and roi support for 120hz, 90hz & 60hz
VTDR6130 panel on Kera target.
Change-Id: I21bf599aadc6d4f10d25c3f1d232c1ba37a0d8b1
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This update adjusts the PHY timings for the VTDR command mode panel on
Kera RCM/CDP platforms based on the required FPS, following the removal
of the qcom,mdss-dsi-panel-clockrate hardcoding. Previously, the
hardcoding resulted in uniform panel PHY timings across all FPS.
Some Kera RCMs have exhibited screen freeze issues when switching from
120 FPS to 60 FPS in command mode after the removal of the hardcoded
clock rate. Interestingly, this issue has not been observed on Kera
CDPs and other platforms, suggesting potential underlying hardware
differences between CDPs and RCMs that necessitate proper tuning of
panel PHY timings.
Update the panel PHY timings to fix this.
Fixes: I1c3c77eed76 ("ARM: dts: msm: remove hard coded panel clk rate
for kera RCM").
Change-Id: Iffd1d5da485d6961baa49ff96a65882c491a8ff6
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add test-dbl-tuivm, test-msgq-tuivm and tlmm-vm-test
nodes for parrot and parrot vm.
Change-Id: I15e3312cf74f9ddae27b93a941e7d6c7df844c9b
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
Split iomemory-ranges for parrot-vm to be inline
with AC aperture settings.
Change-Id: I6dbf890bd607d916d2429577af6ad164e3cd51db
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add smp2p, qmp_aop and aoss_qmp device tree node to support
SM6150 platform.
Change-Id: Iff80c2e40ebecd26f2c649007e79506984bfc35b
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
Update the regulator voltages for iot and opk variants of qcs610.
Change-Id: I40ceeb873e8be62c5213b978793c33d7d539c747
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
Update power-source to 2 for chipsets to use 1.2 V for BT_EN
CRs-Fixed: 4065538
Change-Id: I72ec6863be8d40b40cdeefbb837f1ac652319173
Signed-off-by: Hemant Gupta <quic_hemantg@quicinc.com>
(cherry picked from commit 4eff48c0b7)
Add interconnect device bindings. These devices can be used to
describe any RPMH and NoC based interconnect devices.
Change-Id: Ic9a21d11bb3ce92ffb0cde91739990441673861d
Signed-off-by: Veera Vegivada <quic_vvegivad@quicinc.com>
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
- Added new SOC-ID's to support parrot target
Change-Id: I75a3db97b95a365e01a94a69b68cf6d41dd1e8b6
Signed-off-by: Manish Kumar Sharma <quic_msharm@quicinc.com>
Added smem, syscon and dependent nodes for SM6150.
Change-Id: Icb9485e46c8720919310bc0e2560bd51b23f5dec
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
Add support for TLMM pinctrl on SM6150 platform.
Change-Id: I45dfd3d84900ed4b24ecda47462c2c5178bbb02f
Signed-off-by: Kunal Singh Ranawat <quic_kranawat@quicinc.com>
Add bindings for sm6150 llcc node.
Change-Id: I4f239f190c01110e59c1081ccf0a57cb1631fb95
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
(cherry picked from commit 4173e882bd59e39d8b698fed8b92417231c98e4e)
Add the Level Shifter's external feedback clock entry to support
the SD card HS50 mode running at 50MHz.
By default, the Sun platforms use the Level Shifter devices with
external feedback clock signal connects back to the MSM in order
for the HS50 mode to work at 50MHz. Without the external feedback
clock, the HS50 mode works at reduced frequency at 37.5MHz.
Change-Id: I56c61411d7f792a389fa85661fce7fa5074e2c9f
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
Update power-source to 2 for chipsets to use 1.2 V for BT_EN
CRs-Fixed: 4065538
Change-Id: I72ec6863be8d40b40cdeefbb837f1ac652319173
Signed-off-by: Hemant Gupta <quic_hemantg@quicinc.com>
Reduce the buffer size from 32KB to 16KB and decrease the number
of buffers submitting to the HW to 128 per pipe for effective
utilization and memory optimization.
Change-Id: I709141bd9083570bb18bba0ce13e86956fdfea4a
Signed-off-by: Pavan Kumar M <quic_rpavan@quicinc.com>
