Add devicetree support for Tuna7 and TunaP SoC.
Change-Id: I5f94559c66f00bcb746fc05f7c445a8e2501d862
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
(cherry picked from commit b0ed9373e7)
Enable idle states devices for virtual CPU to enter LPMs
when idle.
Change-Id: I0e03ea5ac0263a385a1ee4e79f16070826d88320
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Update the following bootargs:
1) Set memhp_default_state to automatically online memory to movable zone
2) Enable memmap_on_memory
3) Align rcu expedited parameters to reduce latency of synchronize_rcu.
Change-Id: I78280accf1ecedbd56378169cb1b0c8af2428ac4
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add the device nodes on tuna oemvm and tuivm to enable qmsgq socket
communication over gunyah message queues.
Change-Id: I42be6dabb313e914691945521962cff53f969a02
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Add qrtr gunyah tuivm node to enable communication between
PVM and TUIVM.
Change-Id: If1eebed90a484ef42803fec74629042b04d7a0db
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Add test nodes for Tuna Trusted VM and OEMVM.
Change-Id: I9b7fe8d547f764e5917e48ef36f9727018a8fb79
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Add ipcc_mproc_n1 device tree node and entries to enable IPCC and mbox
communication between TUIVM and CDSP SecurePD on tuna TUIVM.
Change-Id: Ia38df4150a766a66cdead3c2dd60b4e6fc2fc4cd
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Remove invalid GPIOs and replace them with corresponding pins for Tuna
SoC.
Change-Id: I9db60c4edde97c63296380fd4df7557cf2b5d2e9
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Describe the properties of the memory region virtio-mem supports.
Also reserve the IPA space for dmabuf buffers.
Change-Id: Iad6b41033884828a734aa8562dc3e4d45997968b
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the properties and msgqs of the mem-buf device.
Change-Id: I66e4847e8c141c917f3bda22663fc60e2634917a
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the available dma-buf memory pools on tuna-vm.
Change-Id: Ia2bb3fff1f76a04c4f8a14b51917b59d029f8d5e
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the register, interrupts, and settings of the arm-smmu device.
Change-Id: I8876e31db9cd232963987599c40d0d1b37e35f08
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Even though we use proxy scheduling, during VM bootup hypervisor tries
to boot the VMs as per the affinity-map. This may cause panic in case a
CPU within affinity-map is unavailable.
Affining vCPUs to CPU0 makes sure VM proceeds with
powered-ON sequence, assuming CPU0 is always available.
Change-Id: Ia6799445891e1b003b5055178adb50778bade863
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
For upstream and tvm, qup common driver uses gcc phandles which
are common in dt and to avoid qup driver probe failure, add gcc
qcom-dummycc support as they are nop. This helps in avoiding
additional logic in qup driver to not conditionalize based on
variant.
Change-Id: I770a2a3c0e31138891b3e298ccff8e2934ae91a1
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add support for platforms like ATP, CDP, MTP, QRD and RCM for TUIVM and
OEMVM on Tuna. Also, add support for additional Tuna variant.
Change-Id: Ie7a6c542c7d31db5b823ae10db714ddc43330598
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
