Newly added optional quirk "qcom,sleep-clk-bcr" adds delay of
200-250us after deasserting the USB3 BCR. This is needed on
some targets where sleep clk is used for BCR demet.
Change-Id: I88370838c29f679f2d2d90f565d3884d48bcdff2
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
Bindings file for WALT cycle counter driver is in incorrect location.
Move it to the correct location where all other bindings files are
present.
Change-Id: I9e8ef0a87ac6b311931535a82ccf3c784bcdc896
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>
Binding document to support MPAM(Memory System Resource Partitioning
and Monitoring) MSC(Memory System Component) interface framework added
to support multiple MSC components. Currently SLC(System Level Cache)
MSC support integrated to MSC interface with API support to configure
SLC Capacity and monitors.
Change-Id: I866b0e8cd6106f86535baf004d25e81e406e3e12
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
Vendor prefix qcom was updated for scid-heuristics properties.
Change-Id: I16c9e2197e348eac51d300258e482876bc51302e
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
Child node support for SCID heuristics compatible device.
Change-Id: Id1fb1e190181d39053dce629c6807262032744ad
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
This property describes how large of a movable zone should be created
when the virtio_mem device probes.
Also, fix all errors reported by make dt_binding_check.
Change-Id: I487ad7592d54021ddbb3caddb20774d3e076c766
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add interconnect device bindings for TUNA SoC. These devices
can be used to describe any RPMH and NoC based interconnect devices.
Change-Id: If040c6ebc9457b9385d75cbbe19ad7cd7bcb7994
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Add camera and cambistmclk clock controller bindings on tuna device.
While at it, fix existing yaml documentation for dtbs failure.
Change-Id: I8484292fe7336f1bdd4d018e1a342da04148efd1
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Add documentation for the device qcom,cpucp_fast, which is used
for handling system hints from firmware.
Change-Id: I2336051df317d09d5224244e2d8248242980cc18
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
Update bwmon bindings to include support for non-early memory
mapping.
Change-Id: I4f45ea0fd3f219325463d832c958ebd900f15f1c
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
Enable SPMI node and add its documentation for bring-up.
Change-Id: I6ddfb75c6ba03935a5c8338f859147ea676205dd
Signed-off-by: Akshay Gola <quic_agola@quicinc.com>
Add gh-large-dmabuf-test binding description and requirements
which include compatible, label and optional properties.
Change-Id: Ief22a3b609539ea307f289fb62e7c90b3a1284f6
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
Add generic bindings for the Qualcomm variant of the ARM MMU-500. It is
expected that all future platforms will use the generic qcom,smmu-500
compat string in addition to SoC-specific and the generic arm,mmu-500
ones. Older bindings are now described as deprecated.
Note: I have split the sdx55 and sdx65 from the legacy bindings. They
are not supported by the qcom SMMU implementation. I can suppose that
they are using the generic implementation rather than the
Qualcomm-speicific one.
[Add dt-bindings for qcom,smmu-500 for Qcom SoCs].
Change-Id: Id2520441f556590403ac712f68aa7487ca4f205e
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-5-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
Git-Commit: 6c84bbd103d85696af9cc0f746c01f9b2847637e
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
