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ARM: dts: msm: sun: Add SOCCP_SOCCP_SPARE_REG0 to check SOCCP status

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SOCCP_SOCCP_SPARE_REG0 is used to check D0 status of SOCCP.
TCSR_SOCCP_SLEEP_STATUS is used to check D3 status of SOCCP.

Change-Id: Icee37cddb0b7ef303962cab0d9a8f37a211a05da
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
This commit is contained in:
Gokul krishna Krishnakumar
2024-07-12 14:00:37 -07:00
parent 5d91e5305c
commit f7f2a9a731
1 changed files with 2 additions and 1 deletions
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qcom/sun.dtsi
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@@ -3586,7 +3586,8 @@
clock-names = "xo";
memory-region = <&soccp_mem 0>;
soccp-config = <&tcsr 0x1a000>;
soccp-tcsr = <&tcsr 0x1a000>;
soccp-spare = <0xda0024>;
/* Inputs from SOCCP */
interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,