From f7f2a9a731d783a6574888f606889fced039976c Mon Sep 17 00:00:00 2001 From: Gokul krishna Krishnakumar Date: Fri, 12 Jul 2024 14:00:37 -0700 Subject: [PATCH] ARM: dts: msm: sun: Add SOCCP_SOCCP_SPARE_REG0 to check SOCCP status SOCCP_SOCCP_SPARE_REG0 is used to check D0 status of SOCCP. TCSR_SOCCP_SLEEP_STATUS is used to check D3 status of SOCCP. Change-Id: Icee37cddb0b7ef303962cab0d9a8f37a211a05da Signed-off-by: Gokul krishna Krishnakumar --- qcom/sun.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index 705699a3..2275a15d 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -3586,7 +3586,8 @@ clock-names = "xo"; memory-region = <&soccp_mem 0>; - soccp-config = <&tcsr 0x1a000>; + soccp-tcsr = <&tcsr 0x1a000>; + soccp-spare = <0xda0024>; /* Inputs from SOCCP */ interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,