samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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ARM: dts: msm: Use "iommu-addresses" property for ravelin dwc3

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Use upstream compatible DT property "iommu-addresses" instead
of "qcom,iommu-dma-addr-pool" for dwc3 which describes the
addresses that dwc3 cannot use.
Extend the address and size cells to ensure that IOMMU returns
a 32 bit address, in order to define a region that will block
0xf0000000--0xffffffffffffffff.

Change-Id: I211ba1b8bd1f7717f639d91dddb8adb86f17b42e
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
This commit is contained in:
Saranya R
2024-07-02 18:47:27 +05:30
parent 057667bb21
commit f12b2d8069
1 changed files with 10 additions and 5 deletions
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15
qcom/ravelin-usb.dtsi
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@@ -12,8 +12,8 @@
reg = <0xa600000 0x100000>; reg = <0xa600000 0x100000>;
reg-names = "core_base"; reg-names = "core_base";
#address-cells = <1>; #address-cells = <2>;
#size-cells = <1>; #size-cells = <2>;
ranges; ranges;
USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>; USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>;
@@ -58,13 +58,13 @@
extcon = <&eud>; extcon = <&eud>;
dwc3@a600000 { dwc3_0: dwc3@a600000 {
compatible = "snps,dwc3"; compatible = "snps,dwc3";
reg = <0xa600000 0xd800>; reg = <0x0 0xa600000 0x0 0xd800>;
iommus = <&apps_smmu 0x540 0x0>; iommus = <&apps_smmu 0x540 0x0>;
qcom,iommu-dma = "atomic"; qcom,iommu-dma = "atomic";
qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>; memory-region = <&dwc3_mem_region>;
dma-coherent; dma-coherent;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
@@ -89,6 +89,11 @@
}; };
}; };
dwc3_mem_region: dwc3_mem_region {
iommu-addresses = <&dwc3_0 0x0 0x0 0x0 0x90000000>,
<&dwc3_0 0x0 0xf0000000 0xffffffff 0x10000000>;
};
/* USB port related High Speed PHY */ /* USB port related High Speed PHY */
usb2_phy0: hsphy@88e3000 { usb2_phy0: hsphy@88e3000 {
compatible = "qcom,usb-hsphy-snps-femto"; compatible = "qcom,usb-hsphy-snps-femto";