ARM: dts: msm: Add stub clocks and gdsc nodes for Sun Soc
Add stub clock nodes are required for clocks client to request, so add support for the same. Change-Id: I9c26dcc16e90e79aaf2b7838d205f4c7c44b05bc Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
This commit is contained in:
276
qcom/sun.dtsi
276
qcom/sun.dtsi
@@ -3,6 +3,15 @@
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,camcc-sun.h>
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#include <dt-bindings/clock/qcom,dispcc-sun.h>
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#include <dt-bindings/clock/qcom,evacc-sun.h>
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#include <dt-bindings/clock/qcom,gcc-sun.h>
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#include <dt-bindings/clock/qcom,gpucc-sun.h>
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#include <dt-bindings/clock/qcom,gxclkctl-sun.h>
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#include <dt-bindings/clock/qcom,tcsrcc-sun.h>
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#include <dt-bindings/clock/qcom,videocc-sun.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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@@ -242,6 +251,273 @@
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <19200000>;
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};
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clocks {
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xo_board: xo_board {
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compatible = "fixed-clock";
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clock-frequency = <76800000>;
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clock-output-names = "xo_board";
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#clock-cells = <0>;
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};
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sleep_clk: sleep_clk {
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compatible = "fixed-clock";
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clock-frequency = <32000>;
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clock-output-names = "sleep_clk";
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#clock-cells = <0>;
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};
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pcie_0_pipe_clk: pcie_0_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "pcie_0_pipe_clk";
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#clock-cells = <0>;
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};
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ufs_phy_rx_symbol_0_clk: ufs_phy_rx_symbol_0_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "ufs_phy_rx_symbol_0_clk";
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#clock-cells = <0>;
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};
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ufs_phy_rx_symbol_1_clk: ufs_phy_rx_symbol_1_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "ufs_phy_rx_symbol_1_clk";
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#clock-cells = <0>;
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};
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ufs_phy_tx_symbol_0_clk: ufs_phy_tx_symbol_0_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "ufs_phy_tx_symbol_0_clk";
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#clock-cells = <0>;
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};
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usb3_phy_wrapper_gcc_usb30_pipe_clk: usb3_phy_wrapper_gcc_usb30_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "usb3_phy_wrapper_gcc_usb30_pipe_clk";
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#clock-cells = <0>;
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};
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};
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cxo: bi_tcxo {
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compatible = "fixed-factor-clock";
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clocks = <&xo_board>;
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clock-mult = <1>;
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clock-div = <4>;
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#clock-cells = <0>;
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clock-output-names = "bi_tcxo";
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};
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cxo_a: bi_tcxo_ao {
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compatible = "fixed-factor-clock";
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clocks = <&xo_board>;
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clock-mult = <1>;
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clock-div = <4>;
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#clock-cells = <0>;
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clock-output-names = "bi_tcxo_ao";
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};
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rpmhcc: clock-controller {
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compatible = "fixed-clock";
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clock-output-names = "rpmh_clocks";
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clock-frequency = <19200000>;
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#clock-cells = <1>;
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};
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cambistmclkcc: clock-controller@1760000 {
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compatible = "qcom,dummycc";
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clock-output-names = "cambistmclkcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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camcc: clock-controller@ade0000 {
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compatible = "qcom,dummycc";
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clock-output-names = "camcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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dispcc: clock-controller@af00000 {
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compatible = "qcom,dummycc";
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clock-output-names = "dispcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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evacc: clock-controller@abf0000 {
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compatible = "qcom,dummycc";
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clock-output-names = "evacc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gcc: clock-controller@100000 {
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compatible = "qcom,dummycc";
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clock-output-names = "gcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gpucc: clock-controller@3d90000 {
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compatible = "qcom,dummycc";
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clock-output-names = "gpucc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gxclkctl: clock-controller@3d64000 {
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compatible = "qcom,dummycc";
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clock-output-names = "gxclkctl_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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tcsrcc: clock-controller@f100000 {
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compatible = "qcom,dummycc";
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clock-output-names = "tcsrcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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videocc: clock-controller@aaf0000 {
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compatible = "qcom,dummycc";
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clock-output-names = "videocc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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apsscc: syscon@16450000 {
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compatible = "syscon";
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reg = <0x16450000 0x3553000>;
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};
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mccc: syscon@240ba000 {
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compatible = "syscon";
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reg = <0x240ba000 0x800>;
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};
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/* CAM_CC GDSCs */
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cam_cc_ipe_0_gdsc: qcom,gdsc@adf017c {
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compatible = "qcom,stub-regulator";
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regulator-name = "cam_cc_ipe_0_gdsc";
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qcom,support-hw-trigger;
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};
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cam_cc_ofe_gdsc: qcom,gdsc@adf00c8 {
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compatible = "qcom,stub-regulator";
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regulator-name = "cam_cc_ofe_gdsc";
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qcom,support-hw-trigger;
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};
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cam_cc_tfe_0_gdsc: qcom,gdsc@adf1004 {
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compatible = "qcom,stub-regulator";
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regulator-name = "cam_cc_tfe_0_gdsc";
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};
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cam_cc_tfe_1_gdsc: qcom,gdsc@adf1084 {
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compatible = "qcom,stub-regulator";
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regulator-name = "cam_cc_tfe_1_gdsc";
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};
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cam_cc_tfe_2_gdsc: qcom,gdsc@adf10ec {
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compatible = "qcom,stub-regulator";
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regulator-name = "cam_cc_tfe_2_gdsc";
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};
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cam_cc_titan_top_gdsc: qcom,gdsc@adf134c {
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compatible = "qcom,stub-regulator";
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regulator-name = "cam_cc_titan_top_gdsc";
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};
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/* DISP_CC GDSCs */
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disp_cc_mdss_core_gdsc: qcom,gdsc@af09000 {
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compatible = "qcom,stub-regulator";
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regulator-name = "disp_cc_mdss_core_gdsc";
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qcom,support-hw-trigger;
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};
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disp_cc_mdss_core_int2_gdsc: qcom,gdsc@af0b000 {
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compatible = "qcom,stub-regulator";
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regulator-name = "disp_cc_mdss_core_int2_gdsc";
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qcom,support-hw-trigger;
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};
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/* EVA_CC GDSCs */
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eva_cc_mvs0_gdsc: qcom,gdsc@abf8068 {
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compatible = "qcom,stub-regulator";
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regulator-name = "eva_cc_mvs0_gdsc";
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qcom,support-hw-trigger;
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};
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eva_cc_mvs0c_gdsc: qcom,gdsc@abf8034 {
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compatible = "qcom,stub-regulator";
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regulator-name = "eva_cc_mvs0c_gdsc";
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};
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/* GCC GDSCs */
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gcc_pcie_0_gdsc: qcom,gdsc@16b004 {
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compatible = "qcom,stub-regulator";
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regulator-name = "gcc_pcie_0_gdsc";
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};
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gcc_pcie_0_phy_gdsc: qcom,gdsc@16c000 {
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compatible = "qcom,stub-regulator";
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regulator-name = "gcc_pcie_0_phy_gdsc";
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};
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gcc_ufs_mem_phy_gdsc: qcom,gdsc@19e000 {
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compatible = "qcom,stub-regulator";
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regulator-name = "gcc_ufs_mem_phy_gdsc";
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};
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gcc_ufs_phy_gdsc: qcom,gdsc@177004 {
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compatible = "qcom,stub-regulator";
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regulator-name = "gcc_ufs_phy_gdsc";
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};
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gcc_usb30_prim_gdsc: qcom,gdsc@139004 {
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compatible = "qcom,stub-regulator";
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regulator-name = "gcc_usb30_prim_gdsc";
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};
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gcc_usb3_phy_gdsc: qcom,gdsc@150018 {
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compatible = "qcom,stub-regulator";
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regulator-name = "gcc_usb3_phy_gdsc";
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};
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/* GPU_CC GDSCs */
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gpu_cc_cx_gdsc_hw_ctrl: syscon@3d99094 {
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compatible = "syscon";
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reg = <0x3d99094 0x4>;
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};
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gpu_cc_cx_gdsc: qcom,gdsc@3d99080 {
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compatible = "qcom,stub-regulator";
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regulator-name = "gpu_cc_cx_gdsc";
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};
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/* GX_CLKCTL GDSCs */
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gx_clkctl_gx_gdsc: qcom,gdsc@3d68024 {
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compatible = "qcom,stub-regulator";
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regulator-name = "gx_clkctl_gx_gdsc";
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};
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/* VIDEO_CC GDSCs */
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video_cc_mvs0_gdsc: qcom,gdsc@aaf8068 {
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compatible = "qcom,stub-regulator";
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regulator-name = "video_cc_mvs0_gdsc";
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qcom,support-hw-trigger;
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};
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video_cc_mvs0c_gdsc: qcom,gdsc@aaf8034 {
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compatible = "qcom,stub-regulator";
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regulator-name = "video_cc_mvs0c_gdsc";
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};
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};
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&reserved_memory {
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