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ARM: dts: msm: Add interconnect-names for Ravelin

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Add interconnect-names qup-core,qup-config and qup-memory to all qupv3
nodes.

Change-Id: I6cbed2a84fcd1ae7df96253121fc2dc735110b34
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
This commit is contained in:
Prakash Yadachi
2024-07-02 12:41:44 +05:30
parent 057667bb21
commit e0529a17d7
1 changed files with 16 additions and 16 deletions
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32
qcom/ravelin-qupv3.dtsi
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@@ -95,7 +95,7 @@
reg = <0x980000 0x4000>; reg = <0x980000 0x4000>;
reg-names = "se_phys"; reg-names = "se_phys";
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -114,7 +114,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -135,7 +135,7 @@
reg = <0x984000 0x4000>; reg = <0x984000 0x4000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -159,7 +159,7 @@
#size-cells = <0>; #size-cells = <0>;
reg-names = "se_phys"; reg-names = "se_phys";
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -182,7 +182,7 @@
reg = <0x98c000 0x4000>; reg = <0x98c000 0x4000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -206,7 +206,7 @@
#size-cells = <0>; #size-cells = <0>;
reg-names = "se_phys"; reg-names = "se_phys";
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -230,7 +230,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -253,7 +253,7 @@
#size-cells = <0>; #size-cells = <0>;
reg-names = "se_phys"; reg-names = "se_phys";
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -342,7 +342,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -365,7 +365,7 @@
#size-cells = <0>; #size-cells = <0>;
reg-names = "se_phys"; reg-names = "se_phys";
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -389,7 +389,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -412,7 +412,7 @@
#size-cells = <0>; #size-cells = <0>;
reg-names = "se_phys"; reg-names = "se_phys";
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -436,7 +436,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -460,7 +460,7 @@
#size-cells = <0>; #size-cells = <0>;
reg-names = "se_phys"; reg-names = "se_phys";
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -484,7 +484,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
@@ -507,7 +507,7 @@
#size-cells = <0>; #size-cells = <0>;
reg-names = "se_phys"; reg-names = "se_phys";
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects = interconnects =
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,