samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge "ARM: dts: msm: Remove coherent and voltage-level property in Ravelin"

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QCTECMDR Service
2024-06-27 15:28:37 -07:00
committed by Gerrit - the friendly Code Review server
parent 4d78f89b8a 8e4ec07539
commit dd5d9017d8
5 changed files with 10 additions and 17 deletions
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23
qcom/ravelin.dtsi
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@@ -1741,6 +1741,11 @@
reg = <0x007C4000 0x1000>, <0x007C5000 0x1000>,
<0x007C8000 0x8000>, <0x007D0000 0x9000>;
reg-names = "hc", "cqhci", "cqhci_ice", "cqhci_ice_hwkm";
iommus = <&apps_smmu 0x560 0x0>;
qcom,iommu-dma = "fastmap";
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
qcom,iommu-geometry = <0x40000000 0x10000000>;
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
@@ -1770,6 +1775,11 @@
qcom,ice-clk-rates = <300000000 100000000>;
interconnects = <&aggre2_noc MASTER_SDCC_1 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_SDC1>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
operating-points-v2 = <&sdhc1_opp_table>;
/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
qcom,dll-hsr-list = <0x000F642C 0x0 0x01
0x2C010800 0x80040868>;
@@ -1778,18 +1788,6 @@
resets = <&gcc GCC_SDCC1_BCR>;
reset-names = "core_reset";
iommus = <&apps_smmu 0x560 0x0>;
dma-coherent;
qcom,iommu-dma = "fastmap";
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
qcom,iommu-geometry = <0x40000000 0x10000000>;
interconnects = <&aggre2_noc MASTER_SDCC_1 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_SDC1>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
operating-points-v2 = <&sdhc1_opp_table>;
qos0 {
mask = <0x03>;
vote = <44>;
@@ -1842,7 +1840,6 @@
0x2C010800 0x80040868>;
iommus = <&apps_smmu 0x140 0x0>;
dma-coherent;
qcom,iommu-dma = "fastmap";
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;