ARM: dts: msm: Add initial device tree for parrot

Add initial device tree support for parrot  target.
This is a snapshot of dtsi files as of KP.1.0
'commit <3a433cd2ffb4> ("ARM: dts: msm: Add
ext-region prop of cpusysvm for parrot")'.

Change-Id: I582a3d131b94551da5f6d819003ab1a15ecd36f1
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>

qcom/Makefile

@@ -74,6 +74,40 @@ pineapple-dtb-$(CONFIG_ARCH_PINEAPPLE) += \
 pineapple-overlays-dtb-$(CONFIG_ARCH_PINEAPPLE) += $(PINEAPPLE_BOARDS) $(NOAPQ_PINEAPPLE_BOARDS) $(PINEAPPLE_BASE_DTB) $(PINEAPPLE_APQ_BASE_DTB)
 dtb-y += $(pineapple-dtb-y)
 
+PARROT_BASE_DTB += parrot.dtb parrotp.dtb parrot-sg.dtb parrotp-sg.dtb
+PARROT_4GB_BASE_DTB += parrot-4gb.dtb
+
+PARROT_BOARDS += \
+		 parrot-rumi-overlay.dtbo \
+		 parrot-atp-overlay.dtbo \
+		 parrot-idp-overlay.dtbo \
+		 parrot-idp-wcn3990-overlay.dtbo \
+		 parrot-idp-wcn3990-amoled-rcm-overlay.dtbo \
+		 parrot-idp-wcn6750-amoled-rcm-overlay.dtbo \
+		 parrot-idp-wcn6750-amoled-overlay.dtbo \
+		 parrot-idp-nopmi-overlay.dtbo \
+		 parrot-idp-pm8350b-overlay.dtbo \
+		 parrot-qrd-overlay.dtbo \
+		 parrot-qrd-wcn6750-overlay.dtbo \
+		 parrot-qrd-nopmi-overlay.dtbo   \
+		 parrot-qrd-pm8350b-overlay.dtbo
+
+PARROT_4GB_BOARDS += \
+		 parrot-idp-4gb-overlay.dtbo \
+		 parrot-idp-wcn3990-4gb-overlay.dtbo \
+		 parrot-idp-wcn3990-amoled-rcm-4gb-overlay.dtbo \
+		 parrot-idp-wcn6750-amoled-rcm-4gb-overlay.dtbo \
+		 parrot-idp-wcn6750-amoled-4gb-overlay.dtbo \
+		 parrot-qrd-4gb-overlay.dtbo \
+		 parrot-qrd-wcn6750-4gb-overlay.dtbo \
+
+
+parrot-dtb-$(CONFIG_ARCH_PARROT) += \
+	$(call add-overlays, $(PARROT_BOARDS),$(PARROT_BASE_DTB)) \
+	$(call add-overlays, $(PARROT_4GB_BOARDS),$(PARROT_4GB_BASE_DTB))
+parrot-overlays-dtb-$(CONFIG_ARCH_PARROT) += $(PARROT_BOARDS) $(PARROT_BASE_DTB) $(PARROT_4GB_BOARDS) $(PARROT_4GB_BASE_DTB)
+dtb-y += $(parrot-dtb-y)
+
 endif
 
 ifeq ($(CONFIG_ARCH_PINEAPPLE), y)

qcom/diwali-gdsc.dtsi

@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	/* CAM_CC GDSCs */
+	cam_cc_bps_gdsc: qcom,gdsc@ad10004 {
+		compatible = "qcom,gdsc";
+		reg = <0xad10004 0x4>;
+		regulator-name = "cam_cc_bps_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	cam_cc_ife_0_gdsc: qcom,gdsc@ad13004 {
+		compatible = "qcom,gdsc";
+		reg = <0xad13004 0x4>;
+		regulator-name = "cam_cc_ife_0_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	cam_cc_ife_1_gdsc: qcom,gdsc@ad14004 {
+		compatible = "qcom,gdsc";
+		reg = <0xad14004 0x4>;
+		regulator-name = "cam_cc_ife_1_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	cam_cc_ife_2_gdsc: qcom,gdsc@ad14078 {
+		compatible = "qcom,gdsc";
+		reg = <0xad14078 0x4>;
+		regulator-name = "cam_cc_ife_2_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	cam_cc_ipe_0_gdsc: qcom,gdsc@ad11004 {
+		compatible = "qcom,gdsc";
+		reg = <0xad11004 0x4>;
+		regulator-name = "cam_cc_ipe_0_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	cam_cc_titan_top_gdsc: qcom,gdsc@ad15120 {
+		compatible = "qcom,gdsc";
+		reg = <0xad15120 0x4>;
+		regulator-name = "cam_cc_titan_top_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	cam_cc_camss_top_gdsc: qcom,gdsc@adf4004 {
+		compatible = "qcom,gdsc";
+		reg = <0xadf4004 0x4>;
+		regulator-name = "cam_cc_camss_top_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	/* DISP_CC GDSCs */
+	disp_cc_mdss_core_gdsc: qcom,gdsc@af09000 {
+		compatible = "qcom,gdsc";
+		reg = <0xaf09000 0x4>;
+		regulator-name = "disp_cc_mdss_core_gdsc";
+		proxy-supply = <&disp_cc_mdss_core_gdsc>;
+		qcom,proxy-consumer-enable;
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	disp_cc_mdss_core_int2_gdsc: qcom,gdsc@af0b000 {
+		compatible = "qcom,gdsc";
+		reg = <0xaf0b000 0x4>;
+		regulator-name = "disp_cc_mdss_core_int2_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	/* DISP_CC_0 GDSCs */
+	disp0_cc_mdss_core_gdsc: qcom,disp0-gdsc@af09000 {
+		compatible = "qcom,gdsc";
+		reg = <0xaf09000 0x4>;
+		regulator-name = "disp0_cc_mdss_core_gdsc";
+		proxy-supply = <&disp0_cc_mdss_core_gdsc>;
+		qcom,proxy-consumer-enable;
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	disp0_cc_mdss_core_int2_gdsc: qcom,disp0-gdsc@af0b000 {
+		compatible = "qcom,gdsc";
+		reg = <0xaf0b000 0x4>;
+		regulator-name = "disp0_cc_mdss_core_int2_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	/* DISP_CC_1 GDSCs */
+	disp1_cc_mdss_core_gdsc: qcom,disp1-gdsc@15709000 {
+		compatible = "qcom,gdsc";
+		reg = <0x15709000 0x4>;
+		regulator-name = "disp1_cc_mdss_core_gdsc";
+		proxy-supply = <&disp1_cc_mdss_core_gdsc>;
+		qcom,proxy-consumer-enable;
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	disp1_cc_mdss_core_int2_gdsc: qcom,disp1-gdsc@1570b000 {
+		compatible = "qcom,gdsc";
+		reg = <0x1570b000 0x4>;
+		regulator-name = "disp1_cc_mdss_core_int2_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	gcc_apcs_gdsc_vote_ctrl: syscon@162128 {
+		compatible = "syscon";
+		reg = <0x162128 0x4>;
+	};
+
+	gcc_apcs_gdsc_sleep_ctrl: syscon@162204 {
+		compatible = "syscon";
+		reg = <0x162204 0x4>;
+	};
+
+	/* GCC GDSCs */
+	gcc_pcie_0_gdsc: qcom,gdsc@17b004 {
+		compatible = "qcom,gdsc";
+		reg = <0x17b004 0x4>;
+		regulator-name = "gcc_pcie_0_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		qcom,no-status-check-on-disable;
+		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 0>;
+		status = "disabled";
+	};
+
+	gcc_ufs_phy_gdsc: qcom,gdsc@187004 {
+		compatible = "qcom,gdsc";
+		reg = <0x187004 0x4>;
+		regulator-name = "gcc_ufs_phy_gdsc";
+		qcom,retain-regs;
+		proxy-supply = <&gcc_ufs_phy_gdsc>;
+		qcom,proxy-consumer-enable;
+		status = "disabled";
+	};
+
+	gcc_usb30_prim_gdsc: qcom,gdsc@149004 {
+		compatible = "qcom,gdsc";
+		reg = <0x149004 0x4>;
+		regulator-name = "gcc_usb30_prim_gdsc";
+		qcom,retain-regs;
+		proxy-supply = <&gcc_usb30_prim_gdsc>;
+		qcom,proxy-consumer-enable;
+		status = "disabled";
+	};
+
+	gcc_pcie_0_phy_gdsc: qcom,gdsc@17c000 {
+		compatible = "qcom,gdsc";
+		reg = <0x17c000 0x4>;
+		regulator-name = "gcc_pcie_0_phy_gdsc";
+		qcom,retain-regs;
+		qcom,no-status-check-on-disable;
+		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 3>;
+		status = "disabled";
+	};
+
+	gcc_pcie_1_gdsc: qcom,gdsc@19d004 {
+		compatible = "qcom,gdsc";
+		reg = <0x19d004 0x4>;
+		regulator-name = "gcc_pcie_1_gdsc";
+		qcom,retain-regs;
+		qcom,no-status-check-on-disable;
+		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 1>;
+		status = "disabled";
+	};
+
+	gcc_pcie_1_phy_gdsc: qcom,gdsc@19e000 {
+		compatible = "qcom,gdsc";
+		reg = <0x19e000 0x4>;
+		regulator-name = "gcc_pcie_1_phy_gdsc";
+		qcom,retain-regs;
+		qcom,no-status-check-on-disable;
+		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 4>;
+		status = "disabled";
+	};
+
+	gcc_pcie_2_gdsc: qcom,pcie2-gdsc@19d004 {
+		compatible = "qcom,gdsc";
+		reg = <0x19d004 0x4>;
+		regulator-name = "gcc_pcie_2_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		qcom,no-status-check-on-disable;
+		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 2>;
+		status = "disabled";
+	};
+
+	gcc_usb3_phy_gdsc: qcom,gdsc@160018 {
+		compatible = "qcom,gdsc";
+		reg = <0x160018 0x4>;
+		regulator-name = "gcc_usb3_phy_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	gcc_venus_gdsc: qcom,gdsc@1b6020 {
+		compatible = "qcom,gdsc";
+		reg = <0x1b6020 0x4>;
+		regulator-name = "gcc_venus_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	gcc_vcodec0_gdsc: qcom,gdsc@1b6044 {
+		compatible = "qcom,gdsc";
+		reg = <0x1b6044 0x4>;
+		regulator-name = "gcc_vcodec0_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@18d050 {
+		compatible = "qcom,gdsc";
+		reg = <0x18d050 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@18d058 {
+		compatible = "qcom,gdsc";
+		reg = <0x18d058 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_hf2_gdsc: qcom,gdsc@18d078 {
+		compatible = "qcom,gdsc";
+		reg = <0x18d078 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf2_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_hf3_gdsc: qcom,gdsc@18d07c {
+		compatible = "qcom,gdsc";
+		reg = <0x18d07c 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf3_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_hf4_gdsc: qcom,gdsc@18d088 {
+		compatible = "qcom,gdsc";
+		reg = <0x18d088 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf4_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_hf5_gdsc: qcom,gdsc@18d08c {
+		compatible = "qcom,gdsc";
+		reg = <0x18d08c 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf5_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc: qcom,gdsc@18d054 {
+		compatible = "qcom,gdsc";
+		reg = <0x18d054 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc: qcom,gdsc@18d06c {
+		compatible = "qcom,gdsc";
+		reg = <0x18d06c 0x4>;
+		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_turing_mmu_tbu0_gdsc: qcom,gdsc@18d05c {
+		compatible = "qcom,gdsc";
+		reg = <0x18d05c 0x4>;
+		regulator-name = "hlos1_vote_turing_mmu_tbu0_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	hlos1_vote_turing_mmu_tbu1_gdsc: qcom,gdsc@18d060 {
+		compatible = "qcom,gdsc";
+		reg = <0x18d060 0x4>;
+		regulator-name = "hlos1_vote_turing_mmu_tbu1_gdsc";
+		qcom,no-status-check-on-disable;
+		status = "disabled";
+	};
+
+	/* GPU_CC GDSCs */
+	gpu_cc_cx_hw_ctrl: syscon@3d9953c {
+		compatible = "syscon";
+		reg = <0x3d9953c 0x4>;
+	};
+
+	/* GPU_CC GDSCs */
+	gpu_cc_cx_gdsc: qcom,gdsc@3d99108 {
+		compatible = "qcom,gdsc";
+		reg = <0x3d99108 0x4>;
+		hw-ctrl-addr = <&gpu_cc_cx_hw_ctrl>;
+		regulator-name = "gpu_cc_cx_gdsc";
+		qcom,no-status-check-on-disable;
+		qcom,clk-dis-wait-val = <8>;
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	gpu_cc_gx_domain_addr: syscon@3d99504 {
+		compatible = "syscon";
+		reg = <0x3d99504 0x4>;
+	};
+
+	gpu_cc_gx_sw_reset: syscon@3d99058 {
+		compatible = "syscon";
+		reg = <0x3d99058 0x4>;
+	};
+
+	gpu_cc_gx_acd_reset: syscon@3d99358 {
+		compatible = "syscon";
+		reg = <0x3d99358 0x4>;
+	};
+
+	gpu_cc_gx_acd_iroot_reset: syscon@3d9958c {
+		compatible = "syscon";
+		reg = <0x3d9958c 0x4>;
+	};
+
+	gpu_cc_gx_gdsc: qcom,gdsc@3d9905c {
+		compatible = "qcom,gdsc";
+		reg = <0x3d9905c 0x4>;
+		regulator-name = "gpu_cc_gx_gdsc";
+		domain-addr = <&gpu_cc_gx_domain_addr>;
+		sw-reset = <&gpu_cc_gx_sw_reset>,
+			   <&gpu_cc_gx_acd_reset>,
+			   <&gpu_cc_gx_acd_iroot_reset>;
+		qcom,reset-aon-logic;
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	/* VIDEO_CC GDSCs */
+	video_cc_mvs0_gdsc: qcom,gdsc@aaf81a4 {
+		compatible = "qcom,gdsc";
+		reg = <0xaaf81a4 0x4>;
+		regulator-name = "video_cc_mvs0_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	video_cc_mvs0c_gdsc: qcom,gdsc@aaf8084 {
+		compatible = "qcom,gdsc";
+		reg = <0xaaf8084 0x4>;
+		regulator-name = "video_cc_mvs0c_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	video_cc_mvs1_gdsc: qcom,gdsc@aaf8244 {
+		compatible = "qcom,gdsc";
+		reg = <0xaaf8244 0x4>;
+		regulator-name = "video_cc_mvs1_gdsc";
+		qcom,retain-regs;
+		qcom,support-hw-trigger;
+		status = "disabled";
+	};
+
+	video_cc_mvs1c_gdsc: qcom,gdsc@aaf8124 {
+		compatible = "qcom,gdsc";
+		reg = <0xaaf8124 0x4>;
+		regulator-name = "video_cc_mvs1c_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
+	video_cc_mvsc_gdsc: qcom,gdsc@aaf5004 {
+		compatible = "qcom,gdsc";
+		reg = <0xaaf5004 0x4>;
+		regulator-name = "video_cc_mvsc_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+};

qcom/ipcc-test-parrot.dtsi

@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "ipcc-test.dtsi"
+
+&soc {
+	/delete-node/ ipcc-self-ping-slpi;
+};

qcom/msm-arm-smmu-parrot.dtsi

@@ -0,0 +1,402 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&soc {
+	kgsl_smmu: kgsl-smmu@3da0000 {
+		compatible = "qcom,qsmmu-v500", "qcom,adreno-smmu";
+		reg = <0x3da0000 0x40000>,
+			<0x3de6000 0x20>;
+		reg-names = "base", "tcu-base";
+		#iommu-cells = <2>;
+		qcom,skip-init;
+		qcom,use-3-lvl-tables;
+		qcom,num-context-banks-override = <0x6>;
+		qcom,num-smr-override = <0x6>;
+		#global-interrupts = <1>;
+		#size-cells = <1>;
+		#address-cells = <1>;
+		ranges;
+		dma-coherent;
+
+		qcom,regulator-names = "vdd";
+		vdd-supply = <&gpu_cc_cx_gdsc>;
+
+		clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
+			 <&gpucc GPU_CC_HUB_CX_INT_CLK>,
+			 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
+			 <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+			 <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
+			 <&gpucc GPU_CC_AHB_CLK>;
+		clock-names =
+			"gpu_cc_cx_gmu",
+			"gpu_cc_hub_cx_int",
+			"gpu_cc_hlos1_vote_gpu_smmu",
+			"gcc_gpu_memnoc_gfx",
+			"gcc_gpu_snoc_dvm_gfx",
+			"gpu_cc_ahb";
+
+		qcom,actlr =
+			/* All CBs of GFX: +15 deep PF */
+			<0x000 0x7ff 0x32B>;
+
+		interrupts =	<GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 700 IRQ_TYPE_LEVEL_HIGH>;
+
+		gfx_0_tbu: gfx_0_tbu@3de9000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x3de9000 0x1000>,
+				<0x3de6200 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x0 0x400>;
+			qcom,iova-width = <49>;
+		};
+
+		gfx_1_tbu: gfx_1_tbu@3ded000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x3ded000 0x1000>,
+				<0x3de6208 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x400 0x400>;
+			qcom,iova-width = <49>;
+		};
+	};
+
+	apps_smmu: apps-smmu@15000000 {
+		compatible = "qcom,qsmmu-v500";
+		reg = <0x15000000 0x100000>,
+			<0x151da000 0x20>;
+		reg-names = "base", "tcu-base";
+		#iommu-cells = <2>;
+		qcom,skip-init;
+		qcom,use-3-lvl-tables;
+		qcom,num-context-banks-override = <0x4e>;
+		qcom,num-smr-override = <0x78>;
+		qcom,handoff-smrs = <0x800 0x402>;
+		#global-interrupts = <1>;
+		#size-cells = <1>;
+		#address-cells = <1>;
+		ranges;
+		dma-coherent;
+
+		interrupts =	<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 670 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 671 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>;
+
+		qcom,actlr =
+			/* Camera clients, +0 PF */
+			<0x8A0 0x4A0 0x1>,
+			<0xcA0 0x4A0 0x1>,
+			<0x2000 0xE0 0x1>,
+			<0x2100 0x60 0x1>,
+			/* For Display clients, +3 PF */
+			<0x800 0x407 0x103>,
+			<0xc00 0x407 0x103>,
+			/* For video clients, +0 PF */
+			<0x2180 0x27 0x1>,
+			/* NSP clients, +15PF */
+			<0x1000 0x7ff 0x303>;
+
+		interconnects = <&gem_noc MASTER_APPSS_PROC
+				&cnoc3 SLAVE_TCU>;
+		qcom,active-only;
+
+		anoc_1_tbu: anoc_1_tbu@151dd000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151dd000 0x1000>,
+				<0x151da200 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x0 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			interconnects = <&gem_noc MASTER_APPSS_PROC
+					&cnoc3 SLAVE_IMEM>;
+			qcom,active-only;
+		};
+
+		anoc_2_tbu: anoc_2_tbu@151e1000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151e1000 0x1000>,
+				<0x151da208  0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x400 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			interconnects = <&gem_noc MASTER_APPSS_PROC
+					&cnoc3 SLAVE_IMEM>;
+			qcom,active-only;
+		};
+
+		mnoc_hf_0_tbu: mnoc_hf_0_tbu@151e5000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151e5000 0x1000>,
+				<0x151da210 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x800 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			qcom,regulator-names = "vdd";
+			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>;
+			interconnects = <&mmss_noc MASTER_CAMNOC_HF
+					&mc_virt SLAVE_EBI1>;
+			qcom,active-only;
+		};
+
+		mnoc_hf_1_tbu: mnoc_hf_1_tbu@151e9000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151e9000 0x1000>,
+				<0x151da218 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0xc00 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			qcom,regulator-names = "vdd";
+			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>;
+			interconnects = <&mmss_noc MASTER_CAMNOC_HF
+					&mc_virt SLAVE_EBI1>;
+			qcom,active-only;
+		};
+
+		compute_1_tbu: compute_1_tbu@151ed000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151ed000 0x1000>,
+				<0x151da220 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x1000 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			qcom,regulator-names = "vdd";
+			vdd-supply = <&hlos1_vote_turing_mmu_tbu1_gdsc>;
+			interconnects = <&nsp_noc MASTER_CDSP_PROC
+					&mc_virt SLAVE_EBI1>;
+			qcom,active-only;
+		};
+
+		compute_0_tbu: compute_0_tbu@151f1000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151f1000 0x1000>,
+				<0x151da228 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x1400 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			qcom,regulator-names = "vdd";
+			vdd-supply = <&hlos1_vote_turing_mmu_tbu0_gdsc>;
+			interconnects = <&nsp_noc MASTER_CDSP_PROC
+					&mc_virt SLAVE_EBI1>;
+			qcom,active-only;
+		};
+
+		lpass_tbu: lpass_tbu@151f5000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151f5000 0x1000>,
+				<0x151da230 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x1800 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			interconnects = <&lpass_ag_noc MASTER_LPASS_PROC
+					&mc_virt SLAVE_EBI1>;
+			qcom,active-only;
+		};
+
+		pcie_tbu: pcie_tbu@151f9000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151f9000 0x1000>,
+				<0x151da238 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x1c00 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			interconnects = <&pcie_noc MASTER_PCIE_0
+					&mc_virt SLAVE_EBI1>;
+			qcom,active-only;
+		};
+
+		sf_0_tbu: sf_0_tbu@151fd000 {
+			compatible = "qcom,qsmmuv500-tbu";
+			reg = <0x151fd000 0x1000>,
+				<0x151da240 0x8>;
+			reg-names = "base", "status-reg";
+			qcom,stream-id-range = <0x2000 0x400>;
+			qcom,iova-width = <36>;
+			qcom,micro-idle;
+			qcom,regulator-names = "vdd";
+			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc>;
+			interconnects = <&mmss_noc MASTER_CAMNOC_SF
+					&mc_virt SLAVE_EBI1>;
+			qcom,active-only;
+		};
+	};
+
+	dma_dev@0x0 {
+		compatible = "qcom,iommu-dma";
+		memory-region = <&system_cma>;
+	};
+
+	iommu_test_device {
+		compatible = "qcom,iommu-debug-test";
+
+		usecase0_apps {
+			compatible = "qcom,iommu-debug-usecase";
+			iommus = <&apps_smmu 0x7e0 0>;
+		};
+
+		usecase1_apps_fastmap {
+			compatible = "qcom,iommu-debug-usecase";
+			iommus = <&apps_smmu 0x7e0 0>;
+			qcom,iommu-dma = "fastmap";
+		};
+
+		usecase2_apps_atomic {
+			compatible = "qcom,iommu-debug-usecase";
+			iommus = <&apps_smmu 0x7e0 0>;
+			qcom,iommu-dma = "atomic";
+		};
+
+		usecase3_apps_dma {
+			compatible = "qcom,iommu-debug-usecase";
+			iommus = <&apps_smmu 0x7e1 0>;
+			dma-coherent;
+		};
+
+		usecase4_apps_secure {
+			compatible = "qcom,iommu-debug-usecase";
+			iommus = <&apps_smmu 0x7e0 0>;
+			qcom,iommu-dma = "atomic";
+			qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
+		};
+
+		usecase5_kgsl {
+			compatible = "qcom,iommu-debug-usecase";
+			iommus = <&kgsl_smmu 0x7 0x400>;
+		};
+
+		usecase6_kgsl_dma {
+			compatible = "qcom,iommu-debug-usecase";
+			iommus = <&kgsl_smmu 0x407 0x400>;
+			dma-coherent;
+		};
+	};
+};

qcom/parrot-4gb.dts

@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-4gb.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot 4Gb SoC";
+	compatible = "qcom,parrot";
+	qcom,board-id = <0 0x600>;
+};

qcom/parrot-4gb.dtsi

@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot.dtsi"
+/ {
+};
+
+&non_secure_display_dma_buf {
+	status = "disabled";
+};
+
+&non_secure_display_memory {
+	status = "disabled";
+};
+
+&mem_client_3_size {
+	qcom,peripheral-size = <0x200000>;
+};
+
+&trust_ui_vm_mem {
+	status = "disabled";
+};
+
+&trust_ui_vm_qrtr {
+	status = "disabled";
+};
+
+&trust_ui_vm_vblk0_ring {
+	status = "disabled";
+};
+
+&trust_ui_vm_swiotlb {
+	status = "disabled";
+};
+
+&soc {
+
+	qcom,guestvm_loader@e0b00000 {
+		status = "disabled";
+	};
+
+	qrtr-gunyah {
+		status = "disabled";
+	};
+
+	qcom,virtio_backend@0 {
+		status = "disabled";
+	};
+
+};

qcom/parrot-atp-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-atp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot ATP";
+	compatible = "qcom,parrot-atp", "qcom,parrot", "qcom,atp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <33 0>;
+};

qcom/parrot-atp.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-atp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot ATP";
+	compatible = "qcom,parrot-atp", "qcom,parrot", "qcom,atp";
+	qcom,board-id = <33 0>;
+};

qcom/parrot-atp.dtsi

@@ -0,0 +1,173 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "parrot-pm7250b.dtsi"
+#include "parrot-pmic-overlay.dtsi"
+#include "parrot-thermal-overlay.dtsi"
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		label = "gpio-keys";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&key_vol_up_default>;
+
+		vol_up {
+			label = "volume_up";
+			gpios = <&pm6450_gpios 1 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			linux,code = <KEY_VOLUMEUP>;
+			gpio-key,wakeup;
+			debounce-interval = <15>;
+			linux,can-disable;
+		};
+	};
+};
+
+&ufsphy_mem {
+	compatible = "qcom,ufs-phy-qmp-v4-waipio";
+
+	vdda-phy-supply = <&L5B>;
+	vdda-pll-supply = <&L16B>;
+	vdda-phy-max-microamp = <140000>;
+	vdda-pll-max-microamp = <18300>;
+
+	status = "ok";
+};
+
+&ufshc_mem {
+	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
+
+	vcc-supply = <&L24B>;
+	vcc-max-microamp = <1200000>;
+
+	vccq-supply = <&L13B>;
+	vccq-max-microamp = <1200000>;
+
+	vccq2-supply = <&L19B>;
+	vccq2-max-microamp = <750000>;
+
+	qcom,vddp-ref-clk-supply = <&L13B>;
+	qcom,vddp-ref-clk-max-microamp = <100>;
+
+	/*
+	 * ufs-dev-types and nvmem entries are for ufs device
+	 * identification using nvmem interface. Use number of
+	 * ufs devices supported for ufs-dev-types, and nvmem handle
+	 * added by pmic for sdam register.
+	 *
+	 * Default value taken by driver is bit[0] = 0 for 3.x and
+	 * bit[0] = 1 for 2.x driver code takes this as default case.
+	 *
+	 * But Bit value to identify ufs device is not consistent
+	 * across the targets it could be bit[0] = 0/1 for UFS2.x/3x
+	 * and vice versa. If the bit[0] value is not same as default
+	 * value used in driver and if its reverted then use flag
+	 * qcom,ufs-dev-revert to identify ufs device.
+	 */
+	ufs-dev-types = <2>;
+	qcom,ufs-dev-revert;
+	nvmem-cells = <&ufs_dev>, <&boot_config>;
+	nvmem-cell-names = "ufs_dev", "boot_conf";
+
+	status = "ok";
+};
+
+&battery_charger {
+	qcom,thermal-mitigation = <3000000 1500000 1000000 500000>;
+	qcom,wireless-charging-not-supported;
+};
+
+&qupv3_se9_spi {
+	status = "ok";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	qcom,spi-touch-active = "focaltech,fts_ts";
+
+	focaltech@0 {
+		reg = <0x0>;
+		spi-max-frequency = <6000000>;
+		interrupt-parent = <&tlmm>;
+		interrupts = <65 0x2008>;
+		focaltech,reset-gpio = <&tlmm 64 0x00>;
+		focaltech,irq-gpio = <&tlmm 65 0x2008>;
+		focaltech,display-coords = <0 0 1080 2340>;
+		focaltech,max-touch-number = <5>;
+		focaltech,ic-type = <0x3658D488>;
+		focaltech,touch-type = "primary";
+
+		vdd-supply = <&L28B>;
+
+		pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release";
+		pinctrl-0 = <&ts_spi_active>;
+		pinctrl-1 = <&ts_spi_int_suspend &ts_spi_reset_suspend>;
+		pinctrl-2 = <&ts_spi_release>;
+	};
+};
+
+&sdhc_1 {
+	status = "ok";
+
+	vdd-supply = <&L24B>;
+	qcom,vdd-current-level = <0 570000>;
+
+	vdd-io-supply = <&L19B>;
+	qcom,vdd-io-always-on;
+	qcom,vdd-io-lpm-sup;
+	qcom,vdd-io-current-level = <0 325000>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc1_on>;
+	pinctrl-1 = <&sdc1_off>;
+};
+
+&sdhc_2 {
+	status = "ok";
+
+	vdd-supply = <&L9E>;
+	qcom,vdd-voltage-level = <2960000 2960000>;
+	qcom,vdd-current-level = <0 800000>;
+
+	vdd-io-supply = <&L6E>;
+	qcom,vdd-io-voltage-level = <1800000 2960000>;
+	qcom,vdd-io-current-level = <0 22000>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc2_on>;
+	pinctrl-1 = <&sdc2_off>;
+
+	cd-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
+};
+
+&usb0 {
+	usb-role-switch;
+	extcon = <&eud>;
+
+	dwc3@a600000 {
+		usb-role-switch;
+		dr_mode = "otg";
+	};
+
+	port {
+		usb_port0: endpoint {
+			remote-endpoint = <&usb_port0_connector>;
+		};
+	};
+};
+
+&ucsi {
+	connector {
+		port {
+			usb_port0_connector: endpoint {
+				remote-endpoint = <&usb_port0>;
+			};
+		};
+	};
+};

qcom/parrot-dma-heaps.dtsi

@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/arm/msm/qcom_dma_heap_dt_constants.h>
+
+&soc {
+	qcom,dma-heaps {
+		compatible = "qcom,dma-heaps";
+		qcom,secure_cdsp {
+			qcom,dma-heap-name = "qcom,cma-secure-cdsp";
+			qcom,dma-heap-type = <HEAP_TYPE_CMA>;
+			memory-region = <&cdsp_secure_heap>;
+		};
+
+		qcom,adsp {
+			qcom,dma-heap-name = "qcom,adsp";
+			qcom,dma-heap-type = <HEAP_TYPE_CMA>;
+			memory-region = <&sdsp_mem>;
+		};
+
+		qcom,audio_ml {
+			qcom,dma-heap-name = "qcom,audio-ml";
+			qcom,dma-heap-type = <HEAP_TYPE_CMA>;
+			memory-region = <&audio_cma_mem>;
+		};
+
+		non_secure_display_dma_buf: qcom,display {
+			qcom,dma-heap-name = "qcom,display";
+			qcom,dma-heap-type = <HEAP_TYPE_CMA>;
+			qcom,max-align = <9>;
+			memory-region = <&non_secure_display_memory>;
+		};
+
+		qcom,qseecom {
+			qcom,dma-heap-name = "qcom,qseecom";
+			qcom,dma-heap-type = <HEAP_TYPE_CMA>;
+			memory-region = <&qseecom_mem>;
+		};
+
+		qcom,qseecom_ta {
+			qcom,dma-heap-name = "qcom,qseecom-ta";
+			qcom,dma-heap-type = <HEAP_TYPE_CMA>;
+			memory-region = <&qseecom_ta_mem>;
+		};
+	};
+};

qcom/parrot-idp-4gb-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP 4GB DDR";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>;
+	qcom,board-id = <34 0x600>;
+};

qcom/parrot-idp-4gb.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-4gb.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP 4GB DDR";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0x600>;
+};

qcom/parrot-idp-4gb.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp.dtsi"

qcom/parrot-idp-nopmi-overlay.dts

@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <34 0>;
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+};

qcom/parrot-idp-nopmi.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0>;
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+};

qcom/parrot-idp-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <34 0>;
+};

qcom/parrot-idp-pm7250b.dtsi

@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-pm7250b.dtsi"
+
+/ {
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
+};
+
+&battery_charger {
+	qcom,thermal-mitigation = <3000000 1500000 1000000 500000>;
+	qcom,wireless-charging-not-supported;
+};
+
+&usb0 {
+	usb-role-switch;
+	extcon = <&eud>;
+
+	dwc3@a600000 {
+		usb-role-switch;
+		dr_mode = "otg";
+	};
+
+	port {
+		usb_port0: endpoint {
+			remote-endpoint = <&usb_port0_connector>;
+		};
+	};
+};
+
+&ucsi {
+	connector {
+		port {
+			usb_port0_connector: endpoint {
+				remote-endpoint = <&usb_port0>;
+			};
+		};
+	};
+};

qcom/parrot-idp-pm8350b-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp.dtsi"
+#include "parrot-idp-pm8350b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <34 0>;
+};

qcom/parrot-idp-pm8350b.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp.dtsi"
+#include "parrot-idp-pm8350b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0>;
+};

qcom/parrot-idp-pm8350b.dtsi

@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-pm8350b.dtsi"
+
+/ {
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x32 0x0 0x0 0x0 0x0 0x0>;
+};
+
+&battery_charger {
+	qcom,thermal-mitigation = <3000000 1500000 1000000 500000>;
+};
+
+&usb0 {
+	usb-role-switch;
+	extcon = <&eud>;
+
+	dwc3@a600000 {
+		usb-role-switch;
+		dr_mode = "otg";
+	};
+
+	port {
+		usb_port0: endpoint {
+			remote-endpoint = <&usb_port0_connector>;
+		};
+	};
+};
+
+&ucsi {
+	connector {
+		port {
+			usb_port0_connector: endpoint {
+				remote-endpoint = <&usb_port0>;
+			};
+		};
+	};
+};

qcom/parrot-idp-wcn3990-4gb-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-idp-wcn3990-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP 4GB DDR + WCN3990";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>;
+	qcom,board-id = <34 0x601>;
+};

qcom/parrot-idp-wcn3990-4gb.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-4gb.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-idp-wcn3990-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP 4GB DDR + WCN3990";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0x601>;
+};

qcom/parrot-idp-wcn3990-4gb.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp-4gb.dtsi"

qcom/parrot-idp-wcn3990-amoled-rcm-4gb-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-idp-wcn3990-amoled-rcm-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN3990 IDP 4GB DDR + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>;
+	qcom,board-id = <34 0x603>;
+};

qcom/parrot-idp-wcn3990-amoled-rcm-4gb.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-4gb.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-idp-wcn3990-amoled-rcm-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN3990 IDP 4GB DDR + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0x603>;
+};

qcom/parrot-idp-wcn3990-amoled-rcm-4gb.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp-4gb.dtsi"

qcom/parrot-idp-wcn3990-amoled-rcm-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-idp-wcn3990-amoled-rcm.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN3990 IDP + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <34 3>;
+};

qcom/parrot-idp-wcn3990-amoled-rcm.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-idp-wcn3990-amoled-rcm.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN3990 IDP + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 3>;
+};

qcom/parrot-idp-wcn3990-amoled-rcm.dtsi

@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp.dtsi"
+
+&soc {
+};
+
+&qupv3_se9_i2c {
+	status = "disabled";
+};
+
+&qupv3_se9_spi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "ok";
+	qcom,touch-active = "goodix,gt9916S";
+
+	goodix-berlin@0 {
+		reg = <0>;
+		spi-max-frequency = <1000000>;
+
+		goodix,avdd-name = "avdd";
+		avdd-supply = <&L28B>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <65 0x2008>;
+		goodix,reset-gpio = <&tlmm 64 0x00>;
+		goodix,irq-gpio = <&tlmm 65 0x2008>;
+		goodix,irq-flags = <2>;
+		goodix,panel-max-x = <1080>;
+		goodix,panel-max-y = <2400>;
+		goodix,panel-max-w = <255>;
+		goodix,panel-max-p = <4096>;
+		goodix,firmware-name = "goodix_firmware_spi.bin";
+		goodix,config-name = "goodix_cfg_group_spi.bin";
+
+		pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release";
+		pinctrl-0 = <&ts_spi_active>;
+		pinctrl-1 = <&ts_spi_int_suspend &ts_spi_reset_suspend>;
+		pinctrl-2 = <&ts_spi_release>;
+
+		qcom,touch-environment = "pvm";
+	};
+};

qcom/parrot-idp-wcn3990-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+#include "parrot-wcn3990.dtsi"
+#include "parrot-idp-wcn3990.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP + WCN3990";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <34 1>;
+};

qcom/parrot-idp-wcn3990.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-idp-wcn3990.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP + WCN3990";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 1>;
+};

qcom/parrot-idp-wcn3990.dtsi

@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp.dtsi"
+
+&soc {
+};

qcom/parrot-idp-wcn6750-amoled-4gb-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-wcn6750-amoled-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 IDP 4GB DDR + AMOLED";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>;
+	qcom,board-id = <34 0x604>;
+};

qcom/parrot-idp-wcn6750-amoled-4gb.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-4gb.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-wcn6750-amoled-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 IDP 4GB DDR + AMOLED";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0x604>;
+};

qcom/parrot-idp-wcn6750-amoled-4gb.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp-4gb.dtsi"

qcom/parrot-idp-wcn6750-amoled-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-wcn6750-amoled.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 IDP + AMOLED";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <34 4>;
+};

qcom/parrot-idp-wcn6750-amoled-rcm-4gb-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-wcn6750-amoled-rcm-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 IDP 4GB DDR + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>;
+	qcom,board-id = <34 0x602>;
+};

qcom/parrot-idp-wcn6750-amoled-rcm-4gb.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-4gb.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-wcn6750-amoled-rcm-4gb.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 IDP 4GB DDR + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0x602>;
+};

qcom/parrot-idp-wcn6750-amoled-rcm-4gb.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp-4gb.dtsi"

qcom/parrot-idp-wcn6750-amoled-rcm-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-wcn6750-amoled-rcm.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 IDP + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <34 2>;
+};

qcom/parrot-idp-wcn6750-amoled-rcm.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-wcn6750-amoled-rcm.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 IDP + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 2>;
+};

qcom/parrot-idp-wcn6750-amoled-rcm.dtsi

@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp.dtsi"
+
+&soc {
+};
+
+&qupv3_se9_i2c {
+	status = "disabled";
+};
+
+&qupv3_se9_spi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "ok";
+	qcom,touch-active = "goodix,gt9916S";
+
+	goodix-berlin@0 {
+		reg = <0>;
+		spi-max-frequency = <1000000>;
+
+		goodix,avdd-name = "avdd";
+		avdd-supply = <&L28B>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <65 0x2008>;
+		goodix,reset-gpio = <&tlmm 64 0x00>;
+		goodix,irq-gpio = <&tlmm 65 0x2008>;
+		goodix,irq-flags = <2>;
+		goodix,panel-max-x = <1080>;
+		goodix,panel-max-y = <2400>;
+		goodix,panel-max-w = <255>;
+		goodix,panel-max-p = <4096>;
+		goodix,firmware-name = "goodix_firmware_spi.bin";
+		goodix,config-name = "goodix_cfg_group_spi.bin";
+
+		pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release";
+		pinctrl-0 = <&ts_spi_active>;
+		pinctrl-1 = <&ts_spi_int_suspend &ts_spi_reset_suspend>;
+		pinctrl-2 = <&ts_spi_release>;
+
+		qcom,touch-environment = "pvm";
+	};
+};

qcom/parrot-idp-wcn6750-amoled.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp-wcn6750-amoled.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 IDP + AMOLED";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 4>;
+};

qcom/parrot-idp-wcn6750-amoled.dtsi

@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp.dtsi"
+
+&soc {
+};
+
+&qupv3_se9_i2c {
+	status = "disabled";
+};
+
+&qupv3_se9_spi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "ok";
+	qcom,touch-active = "goodix,gt9916S";
+
+	goodix-berlin@0 {
+		reg = <0>;
+		spi-max-frequency = <1000000>;
+
+		goodix,avdd-name = "avdd";
+		avdd-supply = <&L28B>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <65 0x2008>;
+		goodix,reset-gpio = <&tlmm 64 0x00>;
+		goodix,irq-gpio = <&tlmm 65 0x2008>;
+		goodix,irq-flags = <2>;
+		goodix,panel-max-x = <1080>;
+		goodix,panel-max-y = <2400>;
+		goodix,panel-max-w = <255>;
+		goodix,panel-max-p = <4096>;
+		goodix,firmware-name = "goodix_firmware_spi.bin";
+		goodix,config-name = "goodix_cfg_group_spi.bin";
+
+		pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release";
+		pinctrl-0 = <&ts_spi_active>;
+		pinctrl-1 = <&ts_spi_int_suspend &ts_spi_reset_suspend>;
+		pinctrl-2 = <&ts_spi_release>;
+
+		qcom,touch-environment = "pvm";
+	};
+};

qcom/parrot-idp.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-idp.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0>;
+};

qcom/parrot-idp.dtsi

@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "parrot-pmic-overlay.dtsi"
+#include "parrot-thermal-overlay.dtsi"
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		label = "gpio-keys";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&key_vol_up_default>;
+
+		vol_up {
+			label = "volume_up";
+			gpios = <&pm6450_gpios 1 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			linux,code = <KEY_VOLUMEUP>;
+			gpio-key,wakeup;
+			debounce-interval = <15>;
+			linux,can-disable;
+		};
+	};
+};
+
+&pm6450_pwm_1 {
+	status = "ok";
+};
+
+&qupv3_se9_i2c {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	status = "ok";
+	qcom,i2c-touch-active = "novatek,NVT-ts";
+
+	novatek@62 {
+		reg = <0x62>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <13 0x2008>;
+
+		pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
+			"pmx_ts_release";
+
+		pinctrl-0 = <&ts_active>;
+		pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
+		pinctrl-2 = <&ts_release>;
+
+		novatek,reset-gpio = <&tlmm 12 0x00>;
+		novatek,irq-gpio = <&tlmm 13 0x2008>;
+
+		novatek,trusted-touch-mode = "vm_mode";
+		novatek,touch-environment = "pvm";
+		novatek,trusted-touch-spi-irq = <566>;
+		novatek,trusted-touch-io-bases = <0xa8c000 0xa10000>;
+		novatek,trusted-touch-io-sizes = <0x1000 0x4000>;
+		novatek,trusted-touch-vm-gpio-list = <&tlmm 10 0 &tlmm 11 0
+						&tlmm 12 0 &tlmm 13 0x2008>;
+	};
+
+	focaltech@38 {
+		status = "disabled";
+		reg = <0x38>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <13 0x2008>;
+		focaltech,reset-gpio = <&tlmm 12 0x00>;
+		focaltech,irq-gpio = <&tlmm 13 0x2008>;
+		focaltech,display-coords = <0 0 1080 2408>;
+		focaltech,max-touch-number = <5>;
+		focaltech,ic-type = <0x8726081C>;
+		focaltech,touch-type = "primary";
+
+		pinctrl-names = "pmx_ts_active","pmx_ts_suspend","pmx_ts_release";
+		pinctrl-0 = <&ts_active>;
+		pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
+		pinctrl-2 = <&ts_release>;
+	};
+};
+
+&sdhc_1 {
+	status = "ok";
+
+	vdd-supply = <&L24B>;
+	qcom,vdd-current-level = <0 570000>;
+
+	vdd-io-supply = <&L19B>;
+	qcom,vdd-io-always-on;
+	qcom,vdd-io-lpm-sup;
+	qcom,vdd-io-current-level = <0 325000>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc1_on>;
+	pinctrl-1 = <&sdc1_off>;
+};
+
+&sdhc_2 {
+	status = "ok";
+
+	vdd-supply = <&L9E>;
+	qcom,vdd-voltage-level = <2960000 2960000>;
+	qcom,vdd-current-level = <0 800000>;
+
+	vdd-io-supply = <&L6E>;
+	qcom,vdd-io-voltage-level = <1800000 2960000>;
+	qcom,vdd-io-current-level = <0 22000>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc2_on>;
+	pinctrl-1 = <&sdc2_off>;
+
+	cd-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
+};
+
+&ufsphy_mem {
+	compatible = "qcom,ufs-phy-qmp-v4-waipio";
+
+	vdda-phy-supply = <&L5B>;
+	vdda-pll-supply = <&L16B>;
+	vdda-phy-max-microamp = <140000>;
+	vdda-pll-max-microamp = <18300>;
+
+	status = "ok";
+};
+
+&ufshc_mem {
+	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
+
+	vcc-supply = <&L24B>;
+	vcc-max-microamp = <1200000>;
+
+	vccq-supply = <&L13B>;
+	vccq-max-microamp = <1200000>;
+
+	vccq2-supply = <&L19B>;
+	vccq2-max-microamp = <750000>;
+
+	qcom,vddp-ref-clk-supply = <&L13B>;
+	qcom,vddp-ref-clk-max-microamp = <100>;
+
+	/*
+	 * ufs-dev-types and nvmem entries are for ufs device
+	 * identification using nvmem interface. Use number of
+	 * ufs devices supported for ufs-dev-types, and nvmem handle
+	 * added by pmic for sdam register.
+	 *
+	 * Default value taken by driver is bit[0] = 0 for 3.x and
+	 * bit[0] = 1 for 2.x driver code takes this as default case.
+	 *
+	 * But Bit value to identify ufs device is not consistent
+	 * across the targets it could be bit[0] = 0/1 for UFS2.x/3x
+	 * and vice versa. If the bit[0] value is not same as default
+	 * value used in driver and if its reverted then use flag
+	 * qcom,ufs-dev-revert to identify ufs device.
+	 */
+	ufs-dev-types = <2>;
+	qcom,ufs-dev-revert;
+	nvmem-cells = <&ufs_dev>, <&boot_config>;
+	nvmem-cell-names = "ufs_dev", "boot_conf";
+
+	status = "ok";
+};

qcom/parrot-pm7250b.dtsi

@@ -0,0 +1,341 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/thermal/thermal_qti.h>
+#include "pm7250b.dtsi"
+
+&soc {
+	qcom,pmic_glink {
+		status = "okay";
+	};
+
+	qcom,pmic_glink_log {
+		compatible = "qcom,pmic-glink";
+		qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS";
+
+		qcom,battery_debug {
+			compatible = "qcom,battery-debug";
+		};
+
+		qcom,charger_ulog_glink {
+			compatible = "qcom,charger-ulog-glink";
+		};
+
+		spmi_glink_debug: qcom,spmi_glink_debug {
+			compatible = "qcom,spmi-glink-debug";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			depends-on-supply = <&spmi1_bus>;
+
+			/* Primary SPMI bus */
+			spmi@0 {
+				reg = <0>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+
+				qcom,pm7250b-debug@8 {
+					compatible = "qcom,spmi-pmic";
+					reg = <8 SPMI_USID>;
+					qcom,can-sleep;
+				};
+			};
+
+			/* Secondary SPMI bus */
+			spmi@1 {
+				reg = <1>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+
+				smb1394_glink_debug: qcom,smb1394-debug@9 {
+					compatible = "qcom,spmi-pmic";
+					reg = <9 SPMI_USID>;
+					qcom,can-sleep;
+				};
+
+				qcom,smb1394-debug@b {
+					compatible = "qcom,spmi-pmic";
+					reg = <11 SPMI_USID>;
+					qcom,can-sleep;
+				};
+
+				qcom,smb1394-debug@c {
+					compatible = "qcom,spmi-pmic";
+					reg = <12 SPMI_USID>;
+					qcom,can-sleep;
+				};
+			};
+		};
+	};
+};
+
+&glink_edge {
+	qcom,pmic_glink_rpmsg {
+		qcom,glink-channels = "PMIC_RTR_ADSP_APPS";
+	};
+
+	qcom,pmic_glink_log_rpmsg {
+		qcom,glink-channels = "PMIC_LOGS_ADSP_APPS";
+		qcom,intents = <0x800  5
+			0xc00 3
+			0x2000 1>;
+	};
+};
+
+&battery_charger {
+	status = "okay";
+};
+
+&ucsi {
+	status = "okay";
+};
+
+&altmode {
+	status = "okay";
+};
+
+&spmi0_debug_bus {
+	depends-on2-supply = <&smb1394_glink_debug>;
+
+	qcom,pm7250b-debug@8 {
+		compatible = "qcom,spmi-pmic";
+		reg = <8 SPMI_USID>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+		qcom,can-sleep;
+	};
+
+	qcom,pm7250b-debug@9 {
+		compatible = "qcom,spmi-pmic";
+		reg = <9 SPMI_USID>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+		qcom,can-sleep;
+	};
+};
+
+&pm7250b_2 {
+	/* Slave ID - 8 */
+	reg = <8 SPMI_USID>;
+};
+
+&pm7250b_3 {
+	/* Slave ID - 9 */
+	reg = <9 SPMI_USID>;
+};
+
+&pm7250b_clkdiv {
+	clocks = <&rpmhcc RPMH_CXO_CLK>;
+};
+
+&pm7250b_vadc {
+	interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+	smb1390_therm@e {
+		qcom,scale-fn-type = <ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP>;
+	};
+
+	pm7250b_usb_conn_therm {
+		reg = <ADC5_AMUX_THM3_100K_PU>;
+		label = "pm7250b_usb_conn_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pm7250b_smb_skin_therm {
+		reg = <ADC5_AMUX_THM1_100K_PU>;
+		label = "pm7250b_smb_skin_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+	};
+};
+
+&pm7250b_adc_tm {
+	interrupts = <0x8 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+	io-channels = <&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>,
+			<&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>;
+
+	pm7250b_usb_conn_therm {
+		reg = <ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	pm7250b_smb_skin_therm {
+		reg = <ADC5_AMUX_THM1_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&thermal_zones {
+	socd {
+		cooling-maps {
+			socd_apc1 {
+				trip = <&socd_trip>;
+				cooling-device = <&APC1_pause 1 1>;
+			};
+
+			socd_cdsp1 {
+				trip = <&socd_trip>;
+				cooling-device = <&cdsp_sw 4 4>;
+			};
+
+			socd_gpu0 {
+				trip = <&socd_trip>;
+				cooling-device = <&msm_gpu 2 2>;
+			};
+		};
+	};
+
+	pm7250b-ibat-lvl0 {
+		trips {
+			ibat-lvl0 {
+				temperature = <6000>;
+			};
+		};
+	};
+
+	pm7250b-ibat-lvl1 {
+		trips {
+			ibat-lvl1 {
+				temperature = <7500>;
+			};
+		};
+	};
+
+	pm7250b-bcl-lvl0 {
+		cooling-maps {
+			vbat_lte0 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&modem_lte_dsc 8 8>;
+			};
+
+			vbat_nr0_scg {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&modem_nr_scg_dsc 3 3>;
+			};
+
+			vbat_nr0 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&modem_nr_dsc 6 6>;
+			};
+
+			vbat_cdsp0 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&cdsp_sw 2 2>;
+			};
+
+			vbat_cpu_5 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&cpu5_pause 1 1>;
+			};
+
+			vbat_gpu0 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&msm_gpu 1 1>;
+			};
+		};
+	};
+
+	pm7250b-bcl-lvl1 {
+		cooling-maps {
+			vbat_lte1 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&modem_lte_dsc 10 10>;
+			};
+
+			vbat_nr1_scg {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&modem_nr_scg_dsc 10 10>;
+			};
+
+			vbat_nr1 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&modem_nr_dsc 9 9>;
+			};
+
+			vbat_cdsp1 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&cdsp_sw 4 4>;
+			};
+
+			vbat_cpu_6_7 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&cpu_6_7_pause 1 1>;
+			};
+
+			vbat_gpu1 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&msm_gpu 2 2>;
+			};
+		};
+	};
+
+	pm7250b-bcl-lvl2 {
+		cooling-maps {
+			vbat_cdsp2 {
+				trip = <&b_bcl_lvl2>;
+				cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
+			};
+
+			vbat_gpu2 {
+				trip = <&b_bcl_lvl2>;
+				cooling-device = <&msm_gpu 3 THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+
+	sys-therm-7 {
+		polling-delay-passive = <0>;
+		polling-delay = <0>;
+		thermal-sensors =  <&pm7250b_adc_tm ADC5_AMUX_THM3_100K_PU>;
+		trips {
+			active-config0 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+
+			active-config1 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+		};
+	};
+
+	sys-therm-6 {
+		polling-delay-passive = <0>;
+		polling-delay = <0>;
+		thermal-sensors =  <&pm7250b_adc_tm ADC5_AMUX_THM1_100K_PU>;
+		trips {
+			active-config0 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+
+			active-config1 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+		};
+	};
+};
+
+
+&pm7250b_tz {
+	interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+};
+
+&pm7250b_bcl {
+	interrupts = <0x8 0x1d 0x0 IRQ_TYPE_EDGE_RISING>,
+		   <0x8 0x1d 0x1 IRQ_TYPE_EDGE_RISING>,
+		   <0x8 0x1d 0x2 IRQ_TYPE_EDGE_RISING>;
+};

qcom/parrot-pm8350b.dtsi

@@ -0,0 +1,376 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-smb139x.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
+#include <dt-bindings/thermal/thermal_qti.h>
+
+&pm6150a_amoled {
+	/delete-node/ oledb@e000;
+	/delete-node/ ab@de00;
+	/delete-node/ ibb@dc00;
+};
+
+#include "pm8350b.dtsi"
+
+&soc {
+	qcom,pmic_glink {
+		status = "okay";
+	};
+
+	qcom,pmic_glink_log {
+		compatible = "qcom,pmic-glink";
+		qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS";
+
+		qcom,battery_debug {
+			compatible = "qcom,battery-debug";
+		};
+
+		qcom,charger_ulog_glink {
+			compatible = "qcom,charger-ulog-glink";
+		};
+
+		spmi_glink_debug: qcom,spmi_glink_debug {
+			compatible = "qcom,spmi-glink-debug";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			depends-on-supply = <&spmi1_bus>;
+
+			/* Primary SPMI bus */
+			spmi@0 {
+				reg = <0>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+
+				qcom,pm8350b-debug@3 {
+					compatible = "qcom,spmi-pmic";
+					reg = <3 SPMI_USID>;
+					qcom,can-sleep;
+				};
+			};
+
+			/* Secondary SPMI bus */
+			spmi@1 {
+				reg = <1>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+
+				smb1394_glink_debug: qcom,smb1394-debug@9 {
+					compatible = "qcom,spmi-pmic";
+					reg = <9 SPMI_USID>;
+					qcom,can-sleep;
+				};
+
+				qcom,smb1394-debug@b {
+					compatible = "qcom,spmi-pmic";
+					reg = <11 SPMI_USID>;
+					qcom,can-sleep;
+				};
+
+				qcom,smb1394-debug@c {
+					compatible = "qcom,spmi-pmic";
+					reg = <12 SPMI_USID>;
+					qcom,can-sleep;
+				};
+			};
+		};
+	};
+};
+
+&glink_edge {
+	qcom,pmic_glink_rpmsg {
+		qcom,glink-channels = "PMIC_RTR_ADSP_APPS";
+	};
+
+	qcom,pmic_glink_log_rpmsg {
+		qcom,glink-channels = "PMIC_LOGS_ADSP_APPS";
+		qcom,intents = <0x800  5
+			0xc00 3
+			0x2000 1>;
+	};
+};
+
+&battery_charger {
+	status = "okay";
+};
+
+&ucsi {
+	status = "okay";
+};
+
+&altmode {
+	status = "okay";
+};
+
+&spmi0_debug_bus {
+	depends-on2-supply = <&smb1394_glink_debug>;
+
+	qcom,pm8350b-debug@3 {
+		compatible = "qcom,spmi-pmic";
+		reg = <3 SPMI_USID>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+		qcom,can-sleep;
+	};
+};
+
+&apps_rsc_drv2 {
+	rpmh-regulator-ldod1 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldod1";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			 RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L1D: pm8350b_l1: regulator-pm8350b-l1 {
+			regulator-name = "pm8350b_l1";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1296000>;
+			qcom,init-voltage = <1200000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+};
+
+&pmk8350_sdam_2 {
+	hap_cl_brake: cl_brake@7c {
+		reg = <0x7c 0x1>;
+		bits = <0 8>;
+	};
+};
+
+&pm8350b_haptics {
+	nvmem-cell-names = "hap_cl_brake";
+	nvmem-cells = <&hap_cl_brake>;
+	nvmem-names = "hap_cfg_sdam";
+	nvmem = <&pmk8350_sdam_46>;
+	qcom,pbs-client = <&pm8350b_pbs2>;
+};
+
+&pmk8350_vadc {
+	pm8350b_ref_gnd {
+		reg = <PM8350B_ADC7_REF_GND>;
+		label = "pm8350b_ref_gnd";
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pm8350b_vref_1p25 {
+		reg = <PM8350B_ADC7_1P25VREF>;
+		label = "pm8350b_vref_1p25";
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pm8350b_die_temp {
+		reg = <PM8350B_ADC7_DIE_TEMP>;
+		label = "pm8350b_die_temp";
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pm8350b_vph_pwr {
+		reg = <PM8350B_ADC7_VPH_PWR>;
+		label = "pm8350b_vph_pwr";
+		qcom,pre-scaling = <1 3>;
+	};
+
+	pm8350b_vbat_sns {
+		reg = <PM8350B_ADC7_VBAT_SNS>;
+		label = "pm8350b_vbat_sns";
+		qcom,pre-scaling = <1 3>;
+	};
+
+	pm8350b_chg_temp {
+		reg = <PM8350B_ADC7_CHG_TEMP>;
+		label = "pm8350b_chg_temp";
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pm8350b_iin_fb {
+		reg = <PM8350B_ADC7_IIN_FB>;
+		label = "pm8350b_iin_fb";
+		qcom,pre-scaling = <32 100>;
+	};
+
+	pm8350b_ichg_fb {
+		reg = <PM8350B_ADC7_ICHG_FB>;
+		label = "pm8350b_ichg_fb";
+		qcom,pre-scaling = <1000 305185>;
+	};
+
+	pm8350b_usb_in_v_div_16 {
+		reg = <PM8350B_ADC7_USB_IN_V_16>;
+		label = "pm8350b_usb_in_v_div_16";
+		qcom,pre-scaling = <1 16>;
+	};
+
+	smb139x_1_smb_temp {
+		reg = <SMB1394_1_ADC7_SMB_TEMP>;
+		label = "smb139x_1_smb_temp";
+		qcom,hw-settle-time = <200>;
+	};
+
+	smb139x_1_ichg_smb {
+		reg = <SMB1394_1_ADC7_ICHG_SMB>;
+		label = "smb139x_1_ichg_smb";
+		qcom,hw-settle-time = <200>;
+	};
+
+	smb139x_1_iin_smb {
+		reg = <SMB1394_1_ADC7_IIN_SMB>;
+		label = "smb139x_1_iin_smb";
+		qcom,hw-settle-time = <200>;
+	};
+
+	smb139x_2_smb_temp {
+		reg = <SMB1394_2_ADC7_SMB_TEMP>;
+		label = "smb139x_2_smb_temp";
+		qcom,hw-settle-time = <200>;
+	};
+
+	smb139x_2_ichg_smb {
+		reg = <SMB1394_2_ADC7_ICHG_SMB>;
+		label = "smb139x_2_ichg_smb";
+		qcom,hw-settle-time = <200>;
+	};
+
+	smb139x_2_iin_smb {
+		reg = <SMB1394_2_ADC7_IIN_SMB>;
+		label = "smb139x_2_iin_smb";
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&pm8350b_tz {
+	io-channels = <&pmk8350_vadc PM8350B_ADC7_DIE_TEMP>;
+	io-channel-names = "thermal";
+};
+
+&thermal_zones {
+	socd {
+		trips {
+			socd-trip {
+				temperature = <90>;
+				hysteresis = <1>;
+			};
+		};
+
+		cooling-maps {
+			socd_apc1 {
+				trip = <&socd_trip>;
+				cooling-device = <&APC1_pause 1 1>;
+			};
+
+			socd_cdsp1 {
+				trip = <&socd_trip>;
+				cooling-device = <&cdsp_sw 4 4>;
+			};
+
+			socd_gpu0 {
+				trip = <&socd_trip>;
+				cooling-device = <&msm_gpu 2 2>;
+			};
+		};
+	};
+
+	pm8350b-ibat-lvl0 {
+		trips {
+			ibat-lvl0 {
+				temperature = <6000>;
+			};
+		};
+	};
+
+	pm8350b-ibat-lvl1 {
+		trips {
+			ibat-lvl1 {
+				temperature = <7500>;
+			};
+		};
+	};
+
+	pm8350b-bcl-lvl0 {
+		cooling-maps {
+			vbat_lte0 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&modem_lte_dsc 8 8>;
+			};
+
+			vbat_nr0_scg {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&modem_nr_scg_dsc 3 3>;
+			};
+
+			vbat_nr0 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&modem_nr_dsc 6 6>;
+			};
+
+			vbat_cdsp0 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&cdsp_sw 2 2>;
+			};
+
+			vbat_cpu_5 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&cpu5_pause 1 1>;
+			};
+
+			vbat_gpu0 {
+				trip = <&b_bcl_lvl0>;
+				cooling-device = <&msm_gpu 1 1>;
+			};
+		};
+	};
+
+	pm8350b-bcl-lvl1 {
+		cooling-maps {
+			vbat_lte1 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&modem_lte_dsc 10 10>;
+			};
+
+			vbat_nr1_scg {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&modem_nr_scg_dsc 10 10>;
+			};
+
+			vbat_nr1 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&modem_nr_dsc 9 9>;
+			};
+
+			vbat_cdsp1 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&cdsp_sw 4 4>;
+			};
+
+			vbat_cpu_6_7 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&cpu_6_7_pause 1 1>;
+			};
+
+			vbat_gpu1 {
+				trip = <&b_bcl_lvl1>;
+				cooling-device = <&msm_gpu 2 2>;
+			};
+		};
+	};
+
+	pm8350b-bcl-lvl2 {
+		cooling-maps {
+			vbat_cdsp2 {
+				trip = <&b_bcl_lvl2>;
+				cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
+			};
+
+			vbat_gpu2 {
+				trip = <&b_bcl_lvl2>;
+				cooling-device = <&msm_gpu 3 THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+};

qcom/parrot-pmic-overlay.dtsi

@@ -0,0 +1,700 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-pm6450.h>
+
+#define PMR735A_SID	6
+
+#include "pmk8350.dtsi"
+#include "pm6450.dtsi"
+#include "pm6150l.dtsi"
+#include "pmr735a.dtsi"
+
+&soc {
+	reboot_reason {
+		compatible = "qcom,reboot-reason";
+		nvmem-cells = <&restart_reason>;
+		nvmem-cell-names = "restart_reason";
+	};
+
+	pmic-pon-log {
+		compatible = "qcom,pmic-pon-log";
+		nvmem = <&pmk8350_sdam_5>;
+		nvmem-names = "pon_log";
+	};
+};
+
+&pmk8350 {
+	/delete-node/ pon_pbs@800;
+	/delete-node/ pon_hlos@1300;
+
+	pon_hlos@1300 {
+		compatible = "qcom,pm8998-pon";
+		reg = <0x1300>, <0x800>;
+		reg-names = "pon_hlos", "pon_pbs";
+		qcom,log-kpd-event;
+
+		pwrkey {
+			compatible = "qcom,pmk8350-pwrkey";
+			interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
+			linux,code = <KEY_POWER>;
+		};
+
+		resin {
+			compatible = "qcom,pmk8350-resin";
+			interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
+			linux,code = <KEY_VOLUMEDOWN>;
+		};
+	};
+};
+
+&pmk8350_vadc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&quiet_therm_default>;
+
+	/delete-node/ pm8350_ref_gnd;
+	/delete-node/ pm8350_vref_1p25;
+	/delete-node/ pm8350_die_temp;
+	/delete-node/ pm8350_vph_pwr;
+
+	/delete-node/ pm8350b_ref_gnd;
+	/delete-node/ pm8350b_vref_1p25;
+	/delete-node/ pm8350b_die_temp;
+	/delete-node/ pm8350b_vph_pwr;
+	/delete-node/ pm8350b_vbat_sns;
+
+	/delete-node/ pmr735b_ref_gnd;
+	/delete-node/ pmr735b_vref_1p25;
+	/delete-node/ pmr735b_die_temp;
+
+	/* PM6450 Channel nodes */
+	pm6450_ref_gnd {
+		reg = <PM6450_ADC7_REF_GND>;
+		label = "pm6450_ref_gnd";
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pm6450_vref_1p25 {
+		reg = <PM6450_ADC7_1P25VREF>;
+		label = "pm6450_vref_1p25";
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pm6450_die_temp {
+		reg = <PM6450_ADC7_DIE_TEMP>;
+		label = "pm6450_die_temp";
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pm6450_quiet_therm {
+		reg = <PM6450_ADC7_AMUX1_GPIO2_100K_PU>;
+		label = "pm6450_quiet_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+	};
+};
+
+&pmk8350_adc_tm {
+	io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>,
+			<&pmk8350_vadc PM6450_ADC7_AMUX1_GPIO2_100K_PU>;
+
+	pmk8350_xo_therm {
+		reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	pm6450_quiet_therm {
+		reg = <PM6450_ADC7_AMUX1_GPIO2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&pmk8350_sdam_23 {
+	adc_scaling: scaling@bf {
+		reg = <0xbf 0x1>;
+		bits = <0 2>;
+	};
+};
+
+&pmk8350_sdam_1 {
+	ufs_dev: ufs_dev@94 {
+		reg = <0x94 0x1>;
+		bits = <0 0>;
+	};
+};
+
+&pm6450_gpios {
+	key_vol_up {
+		key_vol_up_default: key_vol_up_default {
+			pins = "gpio1";
+			function = "normal";
+			input-enable;
+			bias-pull-up;
+			power-source = <0>;
+		};
+	};
+
+	quiet_therm {
+		quiet_therm_default: quiet_therm_default {
+			pins = "gpio2";
+			bias-high-impedance;
+		};
+	};
+
+	pm8010i_reset {
+		pm8010i_active: pm8010i_active {
+			pins = "gpio3";
+			function = "normal";
+			bias-disable;
+			output-high;
+			power-source = <0>;
+		};
+	};
+
+	pm8010j_reset {
+		pm8010j_active: pm8010j_active {
+			pins = "gpio4";
+			function = "normal";
+			bias-disable;
+			output-high;
+			power-source = <0>;
+		};
+	};
+};
+
+&pm6150l_revid {
+	status = "disabled";
+};
+
+&pm6150l_4 {
+	qcom,power-on@800 {
+		status = "disabled";
+	};
+};
+
+&pm6150l_clkdiv {
+	clocks = <&rpmhcc RPMH_CXO_CLK>;
+};
+
+&pm6150l_vadc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ufs_therm_default &wide_rfc_therm_default>;
+
+	pa_therm2 {
+		reg = <ADC5_AMUX_THM1_100K_PU>;
+		label = "pa_therm2";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+	};
+
+	pa_therm1 {
+		reg = <ADC5_AMUX_THM3_100K_PU>;
+		label = "pa_therm1";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+	};
+
+	ufs_therm {
+		reg = <ADC5_GPIO1_100K_PU>;
+		label = "ufs_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+	};
+
+	wide_rfc_therm {
+		reg = <ADC5_GPIO3_100K_PU>;
+		label = "wide_rfc_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+	};
+};
+
+&pm6150l_gpios {
+	ufs_therm {
+		ufs_therm_default: ufs_therm_default {
+			pins = "gpio5";
+			bias-high-impedance;
+		};
+	};
+
+	wide_rfc_therm {
+		wide_rfc_therm_default: wide_rfc_therm_default {
+			pins = "gpio7";
+			bias-high-impedance;
+		};
+	};
+};
+
+&pm6150l_adc_tm {
+	io-channels = <&pm6150l_vadc ADC5_AMUX_THM1_100K_PU>,
+			<&pm6150l_vadc ADC5_AMUX_THM3_100K_PU>,
+			<&pm6150l_vadc ADC5_GPIO1_100K_PU>,
+			<&pm6150l_vadc ADC5_GPIO3_100K_PU>;
+
+	/* Channel nodes */
+	pa_therm2 {
+		reg = <ADC5_AMUX_THM1_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	pa_therm1 {
+		reg = <ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	ufs_therm {
+		reg = <ADC5_GPIO1_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	wide_rfc_therm {
+		reg = <ADC5_GPIO3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&flash_led {
+	status = "ok";
+	qcom,use-qti-battery-interface;
+};
+
+&pmr735a_spmi {
+	reg = <6 SPMI_USID>;
+};
+
+&pmr735a_tz {
+	interrupts = <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+	io-channels = <&pmk8350_vadc PMR735A_ADC7_DIE_TEMP>;
+	io-channel-names = "thermal";
+};
+
+&thermal_zones {
+	xo-therm {
+		polling-delay-passive = <0>;
+		polling-delay = <0>;
+		thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM1_100K_PU>;
+		trips {
+			active-config0 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+
+			active-config1 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+		};
+	};
+
+	sys-therm-1 {
+		polling-delay-passive = <0>;
+		polling-delay = <0>;
+		thermal-sensors = <&pm6150l_adc_tm ADC5_GPIO1_100K_PU>;
+		trips {
+			active-config0 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+
+			active-config1 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+		};
+	};
+
+	sys-therm-2 {
+		polling-delay-passive = <0>;
+		polling-delay = <0>;
+		thermal-sensors = <&pm6150l_adc_tm ADC5_GPIO3_100K_PU>;
+		trips {
+			active-config0 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+
+			active-config1 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+		};
+	};
+
+	sys-therm-3 {
+		polling-delay-passive = <0>;
+		polling-delay = <0>;
+		thermal-sensors = <&pmk8350_adc_tm PM6450_ADC7_AMUX1_GPIO2_100K_PU>;
+		trips {
+			active-config0 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+
+			active-config1 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+		};
+	};
+
+	sys-therm-4 {
+		polling-delay-passive = <0>;
+		polling-delay = <0>;
+		thermal-sensors = <&pm6150l_adc_tm ADC5_AMUX_THM1_100K_PU>;
+		trips {
+			active-config0 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+
+			active-config1 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+		};
+	};
+
+	sys-therm-5 {
+		polling-delay-passive = <0>;
+		polling-delay = <0>;
+		thermal-sensors = <&pm6150l_adc_tm ADC5_AMUX_THM3_100K_PU>;
+		trips {
+			active-config0 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+
+			active-config1 {
+				temperature = <125000>;
+				hysteresis = <1000>;
+				type = "passive";
+			};
+		};
+	};
+};
+
+/*
+ * Each QUP device that's a parent to PMIC must be listed as a critical device
+ * to GCC
+ */
+&gcc {
+	qcom,critical-devices = <&qupv3_se2_i2c>;
+};
+
+&qupv3_se2_i2c {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "ok";
+
+	pm8010i@8 {
+		compatible = "qcom,i2c-pmic";
+		reg = <0x8>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pm8010i_active>;
+
+		pm8010-chip@900 {
+			reg = <0x900>;
+
+			PM8010I_EN: qcom,pm8008-chip-en {
+				regulator-name = "pm8010i-chip-en";
+			};
+		};
+
+		qcom,revid@100 {
+			reg = <0x100>;
+		};
+	};
+
+	pm8010i@9 {
+		compatible = "qcom,i2c-pmic";
+		reg = <0x9>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		qcom,pm8010i-regulator {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			pm8008_en-supply = <&PM8010I_EN>;
+			vdd_l1_l2-supply = <&S8B>;
+			vdd_l3_l4-supply = <&BOB>;
+			vdd_l5-supply = <&BOB>;
+			vdd_l6-supply = <&BOB>;
+			vdd_l7-supply = <&BOB>;
+
+			L1I: pm8010i_l1: regulator@4000 {
+				reg = <0x4000>;
+				regulator-name = "pm8010i_l1";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1200000>;
+				qcom,min-dropout-voltage = <88000>;
+				qcom,hpm-min-load = <30000>;
+			};
+
+			L2I: pm8010i_l2: regulator@4100 {
+				reg = <0x4100>;
+				regulator-name = "pm8010i_l2";
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1150000>;
+				qcom,min-dropout-voltage = <64000>;
+				qcom,hpm-min-load = <30000>;
+			};
+
+			L3I: pm8010i_l3: regulator@4200 {
+				reg = <0x4200>;
+				regulator-name = "pm8010i_l3";
+				regulator-min-microvolt = <1328000>;
+				regulator-max-microvolt = <3000000>;
+				qcom,min-dropout-voltage = <176000>;
+				qcom,hpm-min-load = <0>;
+			};
+
+			L4I: pm8010i_l4: regulator@4300 {
+				reg = <0x4300>;
+				regulator-name = "pm8010i_l4";
+				regulator-min-microvolt = <1376000>;
+				regulator-max-microvolt = <2900000>;
+				qcom,min-dropout-voltage = <128000>;
+				qcom,hpm-min-load = <0>;
+			};
+
+			L6I: pm8010i_l6: regulator@4500 {
+				reg = <0x4500>;
+				regulator-name = "pm8010i_l6";
+				regulator-min-microvolt = <1376000>;
+				regulator-max-microvolt = <2900000>;
+				qcom,min-dropout-voltage = <128000>;
+				qcom,hpm-min-load = <0>;
+			};
+
+			L7I: pm8010i_l7: regulator@4600 {
+				reg = <0x4600>;
+				regulator-name = "pm8010i_l7";
+				regulator-min-microvolt = <1248000>;
+				regulator-max-microvolt = <3000000>;
+				qcom,min-dropout-voltage = <256000>;
+				qcom,hpm-min-load = <0>;
+			};
+		};
+	};
+
+	pm8010j@c {
+		compatible = "qcom,i2c-pmic";
+		reg = <0xc>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pm8010j_active>;
+
+		pm8010-chip@900 {
+			reg = <0x900>;
+
+			PM8010J_EN: qcom,pm8008-chip-en {
+				regulator-name = "pm8010j-chip-en";
+			};
+		};
+
+		qcom,revid@100 {
+			reg = <0x100>;
+		};
+	};
+
+	pm8010j@d {
+		compatible = "qcom,i2c-pmic";
+		reg = <0xd>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		qcom,pm8010j-regulator {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			pm8008_en-supply = <&PM8010J_EN>;
+			vdd_l1_l2-supply = <&S8B>;
+			vdd_l3_l4-supply = <&S8E>;
+			vdd_l5-supply = <&BOB>;
+			vdd_l6-supply = <&BOB>;
+			vdd_l7-supply = <&BOB>;
+
+			L1J: pm8010j_l1: regulator@4000 {
+				reg = <0x4000>;
+				regulator-name = "pm8010j_l1";
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1150000>;
+				qcom,min-dropout-voltage = <48000>;
+				qcom,hpm-min-load = <30000>;
+			};
+
+			L3J: pm8010j_l3: regulator@4200 {
+				reg = <0x4200>;
+				regulator-name = "pm8010j_l3";
+				regulator-min-microvolt = <1744000>;
+				regulator-max-microvolt = <1900000>;
+				qcom,min-dropout-voltage = <72000>;
+				qcom,hpm-min-load = <0>;
+			};
+
+			L4J: pm8010j_l4: regulator@4300 {
+				reg = <0x4300>;
+				regulator-name = "pm8010j_l4";
+				regulator-min-microvolt = <1664000>;
+				regulator-max-microvolt = <1888000>;
+				qcom,min-dropout-voltage = <152000>;
+				qcom,hpm-min-load = <0>;
+			};
+
+			L6J: pm8010j_l6: regulator@4500 {
+				reg = <0x4500>;
+				regulator-name = "pm8010j_l6";
+				regulator-min-microvolt = <1376000>;
+				regulator-max-microvolt = <2900000>;
+				qcom,min-dropout-voltage = <128000>;
+				qcom,hpm-min-load = <0>;
+			};
+		};
+	};
+};
+
+&soc {
+	display_panel_vddio: display_gpio_regulator@1 {
+		compatible = "qti-regulator-fixed";
+		regulator-name = "display_panel_vddio";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-enable-ramp-delay = <233>;
+		gpio = <&pm6150l_gpios 9 0>;
+		enable-active-high;
+		regulator-boot-on;
+		proxy-supply = <&display_panel_vddio>;
+		qcom,proxy-consumer-enable;
+		pinctrl-names = "default";
+		pinctrl-0 = <&display_panel_vddio_default>;
+	};
+
+	display_panel_avdd: display_gpio_regulator@2 {
+		compatible = "qti-regulator-fixed";
+		regulator-name = "display_panel_avdd";
+		regulator-min-microvolt = <5500000>;
+		regulator-max-microvolt = <5500000>;
+		regulator-enable-ramp-delay = <233>;
+		gpio = <&pm6150l_gpios 4 0>;
+		enable-active-high;
+		regulator-boot-on;
+		proxy-supply = <&display_panel_avdd>;
+		qcom,proxy-consumer-enable;
+		pinctrl-names = "default";
+		pinctrl-0 = <&display_panel_avdd_default>;
+	};
+
+	display_panel_extvdd: display_gpio_regulator@3 {
+		compatible = "qti-regulator-fixed";
+		regulator-name = "display_panel_extvdd";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		regulator-enable-ramp-delay = <233>;
+		gpio = <&pm6150l_gpios 3 0>;
+		enable-active-high;
+		regulator-boot-on;
+		proxy-supply = <&display_panel_extvdd>;
+		qcom,proxy-consumer-enable;
+		pinctrl-names = "default";
+		pinctrl-0 = <&display_panel_extvdd_default>;
+	};
+
+	display_panel_ibb: display_panel_ibb_stub {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "display_panel_ibb";
+		regulator-min-microvolt = <4600000>;
+		regulator-max-microvolt = <6000000>;
+	};
+};
+
+&pm6150l_gpios {
+	display_panel_supply_ctrl {
+		display_panel_vddio_default: display_panel_vddio_default {
+			pins = "gpio9";
+			function = "normal";
+			input-disable;
+			output-enable;
+			bias-disable;
+			power-source = <0>;
+			qcom,drive-strength = <2>;
+		};
+
+		display_panel_avdd_default: display_panel_avdd_default {
+			pins = "gpio4";
+			function = "normal";
+			input-disable;
+			output-enable;
+			bias-disable;
+			power-source = <0>;
+			qcom,drive-strength = <2>;
+		};
+
+		display_panel_extvdd_default: display_panel_extvdd_default {
+			pins = "gpio3";
+			function = "normal";
+			input-disable;
+			output-enable;
+			bias-disable;
+			power-source = <0>;
+			qcom,drive-strength = <2>;
+		};
+	};
+
+	lcd_backlight_ctrl {
+		lcd_backlight_en_default: lcd_backlight_en_default {
+			pins = "gpio10";
+			function = "normal";
+			input-disable;
+			output-enable;
+			bias-disable;
+			power-source = <0>;
+			qcom,drive-strength = <2>;
+		};
+	};
+};
+
+&pm6450_gpios {
+	lcd_backlight_ctrl {
+		lcd_backlight_pwm_default: lcd_backlight_pwm_default {
+			pins = "gpio7";
+			function = "func1";
+			input-disable;
+			output-enable;
+			bias-disable;
+			power-source = <1>;       /* 1.8V */
+			qcom,drive-strength = <2>;
+		};
+	};
+};

qcom/parrot-qrd-4gb-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-qrd-4gb.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD 4GB DDR";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,msm-id = <537 0x10000>;
+	qcom,board-id = <0x1000B 0x600>;
+};

qcom/parrot-qrd-4gb.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-4gb.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-qrd-4gb.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD 4GB DDR";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 0x600>;
+};

qcom/parrot-qrd-4gb.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-qrd.dtsi"

qcom/parrot-qrd-nopmi-overlay.dts

@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-qrd.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <0x1000B 0>;
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+};

qcom/parrot-qrd-nopmi.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-qrd.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+};

qcom/parrot-qrd-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-qrd.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <0x1000B 0>;
+};

qcom/parrot-qrd-pm7250b.dtsi

@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-pm7250b.dtsi"
+
+/ {
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
+};
+
+&battery_charger {
+	qcom,thermal-mitigation = <11500000 11000000 10500000 10000000 9500000
+				9000000 8500000 8000000 7500000 7000000 6500000
+				6000000 5500000 5000000 4500000 4000000 3500000
+				3000000 2500000 2000000 1500000 1000000 500000>;
+	qcom,wireless-charging-not-supported;
+};
+
+&usb0 {
+	usb-role-switch;
+	extcon = <&eud>;
+
+	dwc3@a600000 {
+		usb-role-switch;
+		dr_mode = "otg";
+	};
+
+	port {
+		usb_port0: endpoint {
+			remote-endpoint = <&usb_port0_connector>;
+		};
+	};
+};
+
+&ucsi {
+	connector {
+		port {
+			usb_port0_connector: endpoint {
+				remote-endpoint = <&usb_port0>;
+			};
+		};
+	};
+};

qcom/parrot-qrd-pm8350b-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-qrd.dtsi"
+#include "parrot-qrd-pm8350b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <0x1000B 0>;
+};

qcom/parrot-qrd-pm8350b.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-qrd.dtsi"
+#include "parrot-qrd-pm8350b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+};

qcom/parrot-qrd-pm8350b.dtsi

@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-pm8350b.dtsi"
+
+/ {
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x32 0x0 0x0 0x0 0x0 0x0>;
+};
+
+&battery_charger {
+	qcom,thermal-mitigation-step = <500000>;
+};
+
+&usb0 {
+	usb-role-switch;
+	extcon = <&eud>;
+
+	dwc3@a600000 {
+		usb-role-switch;
+		dr_mode = "otg";
+	};
+
+	port {
+		usb_port0: endpoint {
+			remote-endpoint = <&usb_port0_connector>;
+		};
+	};
+};
+
+&ucsi {
+	connector {
+		port {
+			usb_port0_connector: endpoint {
+				remote-endpoint = <&usb_port0>;
+			};
+		};
+	};
+};

qcom/parrot-qrd-wcn6750-4gb-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-qrd-wcn6750-4gb.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 QRD 4GB DDR";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,msm-id = <537 0x10000>;
+	qcom,board-id = <0x1000B 0x601>;
+};

qcom/parrot-qrd-wcn6750-4gb.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-4gb.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-qrd-wcn6750-4gb.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 QRD 4GB DDR";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 0x601>;
+};

qcom/parrot-qrd-wcn6750-4gb.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-qrd-4gb.dtsi"

qcom/parrot-qrd-wcn6750-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn6750.dtsi"
+#include "parrot-qrd-wcn6750.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>;
+	qcom,board-id = <0x1000B 1>;
+};

qcom/parrot-qrd-wcn6750.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-qrd-wcn6750.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN6750 QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 1>;
+};

qcom/parrot-qrd-wcn6750.dtsi

@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-qrd.dtsi"
+
+&soc {
+};

qcom/parrot-qrd.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-qrd.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+};

qcom/parrot-qrd.dtsi

@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "parrot-pmic-overlay.dtsi"
+#include "parrot-thermal-overlay.dtsi"
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		label = "gpio-keys";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&key_vol_up_default>;
+
+		vol_up {
+			label = "volume_up";
+			gpios = <&pm6450_gpios 1 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			linux,code = <KEY_VOLUMEUP>;
+			gpio-key,wakeup;
+			debounce-interval = <15>;
+			linux,can-disable;
+		};
+	};
+};
+
+&usb2_phy0 {
+	qcom,param-override-seq = <
+			0x83 0x6c
+			0xcb 0x70
+			0x1e 0x74
+			0x03 0x78>;
+};
+
+&sdhc_1 {
+	status = "ok";
+
+	vdd-supply = <&L24B>;
+	qcom,vdd-current-level = <0 570000>;
+
+	vdd-io-supply = <&L19B>;
+	qcom,vdd-io-always-on;
+	qcom,vdd-io-lpm-sup;
+	qcom,vdd-io-current-level = <0 325000>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc1_on>;
+	pinctrl-1 = <&sdc1_off>;
+};
+
+&sdhc_2 {
+	status = "ok";
+
+	vdd-supply = <&L9E>;
+	qcom,vdd-voltage-level = <2960000 2960000>;
+	qcom,vdd-current-level = <0 800000>;
+
+	vdd-io-supply = <&L6E>;
+	qcom,vdd-io-voltage-level = <1800000 2960000>;
+	qcom,vdd-io-current-level = <0 22000>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc2_on>;
+	pinctrl-1 = <&sdc2_off>;
+
+	cd-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
+};
+
+&ufsphy_mem {
+	compatible = "qcom,ufs-phy-qmp-v4-waipio";
+
+	vdda-phy-supply = <&L5B>;
+	vdda-pll-supply = <&L16B>;
+	vdda-phy-max-microamp = <140000>;
+	vdda-pll-max-microamp = <18300>;
+
+	status = "ok";
+};
+
+&ufshc_mem {
+	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
+
+	vcc-supply = <&L24B>;
+	vcc-max-microamp = <1200000>;
+
+	vccq-supply = <&L13B>;
+	vccq-max-microamp = <1200000>;
+
+	vccq2-supply = <&L19B>;
+	vccq2-max-microamp = <750000>;
+
+	qcom,vddp-ref-clk-supply = <&L13B>;
+	qcom,vddp-ref-clk-max-microamp = <100>;
+
+	/*
+	 * ufs-dev-types and nvmem entries are for ufs device
+	 * identification using nvmem interface. Use number of
+	 * ufs devices supported for ufs-dev-types, and nvmem handle
+	 * added by pmic for sdam register.
+	 *
+	 * Default value taken by driver is bit[0] = 0 for 3.x and
+	 * bit[0] = 1 for 2.x driver code takes this as default case.
+	 *
+	 * But Bit value to identify ufs device is not consistent
+	 * across the targets it could be bit[0] = 0/1 for UFS2.x/3x
+	 * and vice versa. If the bit[0] value is not same as default
+	 * value used in driver and if its reverted then use flag
+	 * qcom,ufs-dev-revert to identify ufs device.
+	 */
+	ufs-dev-types = <2>;
+	qcom,ufs-dev-revert;
+	nvmem-cells = <&ufs_dev>, <&boot_config>;
+	nvmem-cell-names = "ufs_dev", "boot_conf";
+
+	status = "ok";
+};
+
+&qupv3_se9_spi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "ok";
+	qcom,touch-active = "goodix,gt9916S";
+
+	goodix-berlin@0 {
+		reg = <0>;
+		spi-max-frequency = <1000000>;
+
+		goodix,avdd-name = "avdd";
+		avdd-supply = <&L28B>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <65 0x2008>;
+		goodix,reset-gpio = <&tlmm 64 0x00>;
+		goodix,irq-gpio = <&tlmm 65 0x2008>;
+		goodix,irq-flags = <2>;
+		goodix,panel-max-x = <1080>;
+		goodix,panel-max-y = <2400>;
+		goodix,panel-max-w = <255>;
+		goodix,panel-max-p = <4096>;
+		goodix,firmware-name = "goodix_firmware_spi.bin";
+		goodix,config-name = "goodix_cfg_group_spi.bin";
+
+		pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release";
+		pinctrl-0 = <&ts_spi_active>;
+		pinctrl-1 = <&ts_spi_int_suspend &ts_spi_reset_suspend>;
+		pinctrl-2 = <&ts_spi_release>;
+
+		qcom,touch-environment = "pvm";
+	};
+};

qcom/parrot-qupv3.dtsi

@@ -0,0 +1,583 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	/* QUPv3 SE Instances
+	 * Qup0 0: SE 0
+	 * Qup0 1: SE 1
+	 * Qup0 2: SE 2
+	 * Qup0 3: SE 3
+	 * Qup0 4: SE 4
+	 * Qup0 5: SE 5
+	 * Qup1 0: SE 6
+	 * Qup1 1: SE 7
+	 * Qup1 2: SE 8
+	 * Qup1 3: SE 9
+	 * Qup1 4: SE 10
+	 * Qup1 5: SE 11
+	 */
+
+	/* GPI Instance */
+	gpi_dma0: qcom,gpi-dma@900000  {
+		compatible = "qcom,gpi-dma";
+		#dma-cells = <5>;
+		reg = <0x900000  0x60000>;
+		reg-names = "gpi-top";
+		iommus = <&apps_smmu 0x176 0x0>;
+		qcom,max-num-gpii = <12>;
+		interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
+		qcom,gpii-mask = <0x3f>;
+		qcom,ev-factor = <2>;
+		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
+		dma-coherent;
+		qcom,gpi-ee-offset = <0x10000>;
+		status = "ok";
+	};
+
+	/* QUPv3_0  wrapper  instance */
+	qupv3_0: qcom,qupv3_0_geni_se@9C0000 {
+		compatible = "qcom,geni-se-qup";
+		reg = <0x9C0000 0x2000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clock-names = "m-ahb", "s-ahb";
+		clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
+			<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
+		iommus = <&apps_smmu 0x163 0x0>;
+		qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
+		qcom,iommu-geometry = <0x40000000 0x10000000>;
+		qcom,iommu-dma = "fastmap";
+		dma-coherent;
+		ranges;
+		status = "ok";
+
+		/* Debug UART Instance */
+		qupv3_se3_2uart: qcom,qup_uart@98c000 {
+			compatible = "qcom,geni-debug-uart";
+			reg = <0x98c000 0x4000>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
+			interconnect-names = "qup-core", "qup-config", "qup-memory";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se3_2uart_tx_active>, <&qupv3_se3_2uart_rx_active>;
+			pinctrl-1 = <&qupv3_se3_2uart_sleep>;
+			status = "disabled";
+		};
+
+		qupv3_se0_i2c: i2c@980000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0x980000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se0_i2c_sda_active>, <&qupv3_se0_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se0_i2c_sleep>;
+			dmas = <&gpi_dma0 0 0 3 64 0>,
+				<&gpi_dma0 1 0 3 64 0>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
+		qupv3_se0_spi: spi@980000 {
+			compatible = "qcom,spi-geni";
+			reg = <0x980000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se0_spi_mosi_active>, <&qupv3_se0_spi_miso_active>,
+					<&qupv3_se0_spi_clk_active>, <&qupv3_se0_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se0_spi_sleep>;
+			dmas = <&gpi_dma0 0 0 1 64 0>,
+				<&gpi_dma0 1 0 1 64 0>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+
+		qupv3_se1_i2c: i2c@984000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0x984000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se1_i2c_sda_active>, <&qupv3_se1_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se1_i2c_sleep>;
+			dmas = <&gpi_dma0 0 1 3 64 0>,
+				<&gpi_dma0 1 1 3 64 0>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
+		qupv3_se1_spi: spi@984000 {
+			compatible = "qcom,spi-geni";
+			reg = <0x984000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se1_spi_mosi_active>, <&qupv3_se1_spi_miso_active>,
+					<&qupv3_se1_spi_clk_active>, <&qupv3_se1_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se1_spi_sleep>;
+			dmas = <&gpi_dma0 0 1 1 64 0>,
+				<&gpi_dma0 1 1 1 64 0>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+
+		qupv3_se2_i2c: i2c@988000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0x988000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se2_i2c_sda_active>, <&qupv3_se2_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se2_i2c_sleep>;
+			dmas = <&gpi_dma0 0 2 3 64 0>,
+				<&gpi_dma0 1 2 3 64 0>;
+			dma-names = "tx", "rx";
+			qcom,shared;
+			status = "disabled";
+		};
+
+		qupv3_se2_spi: spi@988000 {
+			compatible = "qcom,spi-geni";
+			reg = <0x988000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se2_spi_mosi_active>, <&qupv3_se2_spi_miso_active>,
+					<&qupv3_se2_spi_clk_active>, <&qupv3_se2_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se2_spi_sleep>;
+			dmas = <&gpi_dma0 0 2 1 64 0>,
+				<&gpi_dma0 1 2 1 64 0>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+
+		qupv3_se4_i2c: i2c@990000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0x990000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se4_i2c_sda_active>, <&qupv3_se4_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se4_i2c_sleep>;
+			dmas = <&gpi_dma0 0 4 3 64 0>,
+				<&gpi_dma0 1 4 3 64 0>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
+		qupv3_se4_spi: spi@990000 {
+			compatible = "qcom,spi-geni";
+			reg = <0x990000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se4_spi_mosi_active>, <&qupv3_se4_spi_miso_active>,
+					<&qupv3_se4_spi_clk_active>, <&qupv3_se4_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se4_spi_sleep>;
+			dmas = <&gpi_dma0 0 4 1 64 0>,
+				<&gpi_dma0 1 4 1 64 0>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+
+		qupv3_se5_i2c: i2c@994000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0x994000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se5_i2c_sda_active>, <&qupv3_se5_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se5_i2c_sleep>;
+			dmas = <&gpi_dma0 0 5 3 64 0>,
+				<&gpi_dma0 1 5 3 64 0>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
+		qupv3_se5_spi: spi@994000 {
+			compatible = "qcom,spi-geni";
+			reg = <0x994000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
+			<&system_noc MASTER_A1NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se5_spi_mosi_active>, <&qupv3_se5_spi_miso_active>,
+					<&qupv3_se5_spi_clk_active>, <&qupv3_se5_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se5_spi_sleep>;
+			dmas = <&gpi_dma0 0 5 1 64 0>,
+				<&gpi_dma0 1 5 1 64 0>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+	};
+
+	/* GPI Instance */
+	gpi_dma1: qcom,gpi-dma@a00000  {
+		compatible = "qcom,gpi-dma";
+		#dma-cells = <5>;
+		reg = <0xa00000  0x60000>;
+		reg-names = "gpi-top";
+		iommus = <&apps_smmu 0x416 0x0>;
+		qcom,max-num-gpii = <12>;
+		interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
+		qcom,static-gpii-mask = <0x1>;
+		qcom,gpii-mask = <0x3e>;
+		qcom,ev-factor = <2>;
+		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
+		dma-coherent;
+		qcom,gpi-ee-offset = <0x10000>;
+		status = "ok";
+	};
+
+	/* QUPv3_1  wrapper  instance */
+	qupv3_1: qcom,qupv3_1_geni_se@ac0000 {
+		compatible = "qcom,geni-se-qup";
+		reg = <0xac0000 0x2000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clock-names = "m-ahb", "s-ahb";
+		clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
+			<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+		iommus = <&apps_smmu 0x403 0x0>;
+		qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
+		qcom,iommu-geometry = <0x40000000 0x10000000>;
+		qcom,iommu-dma = "fastmap";
+		dma-coherent;
+		ranges;
+		status = "ok";
+
+		qupv3_se6_i2c: i2c@a80000 {
+			compatible = "qcom,i2c-geni";
+				reg = <0xa80000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se6_i2c_sda_active>, <&qupv3_se6_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se6_i2c_sleep>;
+			dmas = <&gpi_dma1 0 0 3 64 0>,
+				<&gpi_dma1 1 0 3 64 0>;
+			dma-names = "tx", "rx";
+		};
+
+		qupv3_se6_spi: spi@a80000 {
+			compatible = "qcom,spi-geni";
+			reg = <0xa80000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se6_spi_mosi_active>, <&qupv3_se6_spi_miso_active>,
+					<&qupv3_se6_spi_clk_active>, <&qupv3_se6_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se6_spi_sleep>;
+			dmas = <&gpi_dma1 0 0 1 64 0>,
+				<&gpi_dma1 1 0 1 64 0>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+
+		qupv3_se7_i2c: i2c@a84000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0xa84000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se7_i2c_sda_active>, <&qupv3_se7_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se7_i2c_sleep>;
+			dmas = <&gpi_dma1 0 1 3 64 0>,
+				<&gpi_dma1 1 1 3 64 0>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
+		qupv3_se7_spi: spi@a84000 {
+			compatible = "qcom,spi-geni";
+			reg = <0xa84000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se7_spi_mosi_active>, <&qupv3_se7_spi_miso_active>,
+					<&qupv3_se7_spi_clk_active>, <&qupv3_se7_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se7_spi_sleep>;
+			dmas = <&gpi_dma1 0 1 1 64 0>,
+				<&gpi_dma1 1 1 1 64 0>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+
+		qupv3_se8_i2c: i2c@a88000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0xa88000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se8_i2c_sda_active>, <&qupv3_se8_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se8_i2c_sleep>;
+			dmas = <&gpi_dma1 0 2 3 64 0>,
+				<&gpi_dma1 1 2 3 64 0>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
+		qupv3_se8_spi: spi@a88000 {
+			compatible = "qcom,spi-geni";
+			reg = <0xa88000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se8_spi_mosi_active>, <&qupv3_se8_spi_miso_active>,
+					<&qupv3_se8_spi_clk_active>, <&qupv3_se8_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se8_spi_sleep>;
+			dmas = <&gpi_dma1 0 2 1 64 0>,
+				<&gpi_dma1 1 2 1 64 0>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+
+		qupv3_se9_i2c: i2c@a8c000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0xa8c000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se9_i2c_sda_active>, <&qupv3_se9_i2c_scl_active>;
+			pinctrl-1 = <&qupv3_se9_i2c_sleep>;
+			dmas = <&gpi_dma1 0 3 3 64 2>,
+				<&gpi_dma1 1 3 3 64 2>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
+		qupv3_se9_spi: spi@a8c000 {
+			compatible = "qcom,spi-geni";
+			reg = <0xa8c000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se9_spi_mosi_active>, <&qupv3_se9_spi_miso_active>,
+					<&qupv3_se9_spi_clk_active>, <&qupv3_se9_spi_cs_active>;
+			pinctrl-1 = <&qupv3_se9_spi_sleep>;
+			dmas = <&gpi_dma1 0 3 1 64 2>,
+				<&gpi_dma1 1 3 1 64 2>;
+			dma-names = "tx", "rx";
+			spi-max-frequency = <50000000>;
+			status = "disabled";
+		};
+
+		/* HS UART Instance */
+		qupv3_se11_4uart: qcom,qup_uart@a94000 {
+			compatible = "qcom,msm-geni-serial-hs";
+			reg = <0xa94000 0x4000>;
+			reg-names = "se_phys";
+			interrupts-extended = <&intc GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
+					<&tlmm 17 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
+			interconnect-names = "qup-core", "snoc-llcc", "qup-ddr";
+			interconnects =
+			<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
+			<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
+			<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+			pinctrl-names = "default", "active", "sleep";
+			pinctrl-0 = <&qupv3_se11_default_cts>, <&qupv3_se11_default_rts>,
+				<&qupv3_se11_default_tx>, <&qupv3_se11_default_rx>;
+			pinctrl-1 = <&qupv3_se11_cts>, <&qupv3_se11_rts>,
+				<&qupv3_se11_tx>, <&qupv3_se11_rx>;
+			pinctrl-2 = <&qupv3_se11_cts>, <&qupv3_se11_rts>,
+				<&qupv3_se11_tx>, <&qupv3_se11_default_rx>;
+			pinctrl-3 = <&qupv3_se11_default_cts>, <&qupv3_se11_default_rts>,
+				<&qupv3_se11_default_tx>, <&qupv3_se11_default_rx>;
+			qcom,wakeup-byte = <0xFD>;
+			status = "disabled";
+		};
+	};
+};

qcom/parrot-regulators.dtsi

@@ -0,0 +1,992 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
+
+&apps_rsc_drv2 {
+	rpmh-regulator-cxlvl {
+		compatible = "qcom,rpmh-arc-regulator";
+		qcom,resource-name = "cx.lvl";
+		proxy-supply = <&VDD_CX_LEVEL>;
+		VDD_CX_LEVEL:
+		S1B_LEVEL:
+		pm6450_s1_level: regulator-pm6450-s1-level {
+			regulator-name = "pm6450_s1_level";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_TURBO>;
+			qcom,proxy-consumer-enable;
+			qcom,proxy-consumer-voltage =
+				<RPMH_REGULATOR_LEVEL_TURBO
+				 RPMH_REGULATOR_LEVEL_MAX>;
+		};
+
+		VDD_CX_LEVEL_AO:
+		S1B_LEVEL_AO:
+		pm6450_s1_level_ao: regulator-pm6450-s1-level-ao {
+			regulator-name = "pm6450_s1_level_ao";
+			qcom,set = <RPMH_REGULATOR_SET_ACTIVE>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+		};
+	};
+
+	rpmh-regulator-gfxlvl {
+		compatible = "qcom,rpmh-arc-regulator";
+		qcom,resource-name = "gfx.lvl";
+		VDD_GFX_LEVEL: S3B_LEVEL:
+		pm6450_s3_level: regulator-pm6450-s3-level {
+			regulator-name = "pm6450_s3_level";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+		};
+	};
+
+	rpmh-regulator-ebilvl {
+		compatible = "qcom,rpmh-arc-regulator";
+		qcom,resource-name = "ebi.lvl";
+		VDD_EBI_LEVEL:
+		S5B_LEVEL:
+		pm6450_s5_level: regulator-pm6450-s5-level {
+			regulator-name = "pm6450_s5_level";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+		};
+	};
+
+	rpmh-regulator-smpb6 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "smpb6";
+		S6B:
+		pm6450_s6: regulator-pm6450-s6 {
+			regulator-name = "pm6450_s6";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1010000>;
+			regulator-max-microvolt = <1170000>;
+			qcom,init-voltage = <1052000>;
+		};
+	};
+
+	rpmh-regulator-smpb7 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "smpb7";
+		S7B:
+		pm6450_s7: regulator-pm6450-s7 {
+			regulator-name = "pm6450_s7";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <1174000>;
+			qcom,init-voltage = <972000>;
+		};
+	};
+
+	rpmh-regulator-smpb8 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "smpb8";
+		S8B:
+		pm6450_s8: regulator-pm6450-s8 {
+			regulator-name = "pm6450_s8";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1224000>;
+			regulator-max-microvolt = <1654000>;
+			qcom,init-voltage = <1272000>;
+		};
+	};
+
+	rpmh-regulator-smpb9 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "smpb9";
+		S9B:
+		pm6450_s9: regulator-pm6450-s9 {
+			regulator-name = "pm6450_s9";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <850000>;
+			regulator-max-microvolt = <2208000>;
+			qcom,init-voltage = <2208000>;
+		};
+	};
+
+	rpmh-regulator-ldob1 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob1";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L1B:
+		pm6450_l1: regulator-pm6450-l1 {
+			regulator-name = "pm6450_l1";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <650000>;
+			qcom,init-voltage = <504000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-lcxlvl {
+		compatible = "qcom,rpmh-arc-regulator";
+		qcom,resource-name = "lcx.lvl";
+		VDD_LPI_CX_LEVEL:
+		L2B_LEVEL:
+		pm6450_l2_level: regulator-pm6450-l2-level {
+			regulator-name = "pm6450_l2_level";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+		};
+	};
+
+	rpmh-regulator-ldob3 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob3";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L3B:
+		pm6450_l3: regulator-pm6450-l3 {
+			regulator-name = "pm6450_l3";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <870000>;
+			regulator-max-microvolt = <970000>;
+			qcom,init-voltage = <904000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob4 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob4";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L4B:
+		pm6450_l4: regulator-pm6450-l4 {
+			regulator-name = "pm6450_l4";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <530000>;
+			regulator-max-microvolt = <864000>;
+			qcom,init-voltage = <530000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob5 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob5";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L5B:
+		pm6450_l5: regulator-pm6450-l5 {
+			regulator-name = "pm6450_l5";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <830000>;
+			regulator-max-microvolt = <920000>;
+			qcom,init-voltage = <880000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob6 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob6";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L6B:
+		pm6450_l6: regulator-pm6450-l6 {
+			regulator-name = "pm6450_l6";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <751000>;
+			regulator-max-microvolt = <824000>;
+			qcom,init-voltage = <751000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob7 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob7";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L7B:
+		pm6450_l7: regulator-pm6450-l7 {
+			regulator-name = "pm6450_l7";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <830000>;
+			regulator-max-microvolt = <920000>;
+			qcom,init-voltage = <912000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob8 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob8";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L8B:
+		pm6450_l8: regulator-pm6450-l8 {
+			regulator-name = "pm6450_l8";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <870000>;
+			regulator-max-microvolt = <970000>;
+			qcom,init-voltage = <870000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-lmxlvl {
+		compatible = "qcom,rpmh-arc-regulator";
+		qcom,resource-name = "lmx.lvl";
+		VDD_LPI_MX_LEVEL:
+		L9B_LEVEL:
+		pm6450_l9_level: regulator-pm6450-l9-level {
+			regulator-name = "pm6450_l9_level";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+		};
+	};
+
+	rpmh-regulator-ldob10 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob10";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L10B:
+		pm6450_l10: regulator-pm6450-l10 {
+			regulator-name = "pm6450_l10";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <824000>;
+			regulator-max-microvolt = <950000>;
+			qcom,init-voltage = <824000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob11 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob11";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L11B:
+		pm6450_l11: regulator-pm6450-l11 {
+			regulator-name = "pm6450_l11";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <348000>;
+			regulator-max-microvolt = <888000>;
+			qcom,init-voltage = <348000>;
+		};
+	};
+
+	rpmh-regulator-ldob12 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob12";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L12B:
+		pm6450_l12: regulator-pm6450-l12 {
+			regulator-name = "pm6450_l12";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1080000>;
+			regulator-max-microvolt = <1240000>;
+			qcom,init-voltage = <1080000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob13 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob13";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L13B:
+		pm6450_l13: regulator-pm6450-l13 {
+			regulator-name = "pm6450_l13";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1080000>;
+			regulator-max-microvolt = <1304000>;
+			qcom,init-voltage = <1200000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob14 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob14";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L14B:
+		pm6450_l14: regulator-pm6450-l14 {
+			regulator-name = "pm6450_l14";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1150000>;
+			regulator-max-microvolt = <1304000>;
+			qcom,init-voltage = <1150000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob16 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob16";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L16B:
+		pm6450_l16: regulator-pm6450-l16 {
+			regulator-name = "pm6450_l16";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1140000>;
+			regulator-max-microvolt = <1260000>;
+			qcom,init-voltage = <1200000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob17 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob17";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L17B:
+		pm6450_l17: regulator-pm6450-l17 {
+			regulator-name = "pm6450_l17";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			qcom,init-voltage = <1200000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob18 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob18";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L18B:
+		pm6450_l18: regulator-pm6450-l18 {
+			regulator-name = "pm6450_l18";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1504000>;
+			regulator-max-microvolt = <2000000>;
+			qcom,init-voltage = <1504000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob19 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob19";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L19B:
+		pm6450_l19: regulator-pm6450-l19 {
+			regulator-name = "pm6450_l19";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1620000>;
+			regulator-max-microvolt = <1980000>;
+			qcom,init-voltage = <1800000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob20 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob20";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L20B:
+		pm6450_l20: regulator-pm6450-l20 {
+			regulator-name = "pm6450_l20";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1700000>;
+			regulator-max-microvolt = <1900000>;
+			qcom,init-voltage = <1700000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob21 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob21";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L21B:
+		pm6450_l21: regulator-pm6450-l21 {
+			regulator-name = "pm6450_l21";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1950000>;
+			qcom,init-voltage = <1800000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob22 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob22";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L22B:
+		pm6450_l22: regulator-pm6450-l22 {
+			regulator-name = "pm6450_l22";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <2000000>;
+			qcom,init-voltage = <1800000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob23 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob23";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L23B:
+		pm6450_l23: regulator-pm6450-l23 {
+			regulator-name = "pm6450_l23";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1650000>;
+			regulator-max-microvolt = <1950000>;
+			qcom,init-voltage = <1800000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob24 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob24";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L24B:
+		pm6450_l24: regulator-pm6450-l24 {
+			regulator-name = "pm6450_l24";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+			/*
+			 * Remove min/max voltages for this regulator as initial
+			 * voltage of  L24B is set to be 2.4v/2.96v during PON
+			 * depending upon the UFS mode. UFS is the only client
+			 * on this and this regulator will only be voted
+			 * for enabling/disabling conditions.
+			 */
+		};
+	};
+
+	rpmh-regulator-ldob25 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob25";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L25B:
+		pm6450_l25: regulator-pm6450-l25 {
+			regulator-name = "pm6450_l25";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <2700000>;
+			regulator-max-microvolt = <3544000>;
+			qcom,init-voltage = <3072000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob26 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob26";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L26B:
+		pm6450_l26: regulator-pm6450-l26 {
+			regulator-name = "pm6450_l26";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1620000>;
+			regulator-max-microvolt = <3300000>;
+			qcom,init-voltage = <1620000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob27 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob27";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L27B:
+		pm6450_l27: regulator-pm6450-l27 {
+			regulator-name = "pm6450_l27";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1620000>;
+			regulator-max-microvolt = <3300000>;
+			qcom,init-voltage = <1620000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldob28 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldob28";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L28B:
+		pm6450_l28: regulator-pm6450-l28 {
+			regulator-name = "pm6450_l28";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <2700000>;
+			regulator-max-microvolt = <3544000>;
+			qcom,init-voltage = <2700000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-msslvl {
+		compatible = "qcom,rpmh-arc-regulator";
+		qcom,resource-name = "mss.lvl";
+		VDD_MODEM_LEVEL:
+		S1E_LEVEL:
+		pm6150l_s1_level: regulator-pm6150l-s1-level {
+			regulator-name = "pm6150l_s1_level";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+		};
+	};
+
+	rpmh-regulator-mxlvl {
+		compatible = "qcom,rpmh-arc-regulator";
+		qcom,resource-name = "mx.lvl";
+		proxy-supply = <&VDD_MXA_LEVEL>;
+
+		VDD_MXA_LEVEL:
+		S3E_LEVEL:
+		pm6150l_s3_level: regulator-pm6150l-s3-level {
+			regulator-name = "pm6150l_s3_level";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_TURBO>;
+			qcom,proxy-consumer-enable;
+			qcom,proxy-consumer-voltage =
+				<RPMH_REGULATOR_LEVEL_TURBO
+				 RPMH_REGULATOR_LEVEL_MAX>;
+		};
+
+		VDD_MXA_LEVEL_AO: S10C_LEVEL_AO:
+		pm6150l_s3_level_ao: regulator-pm6150l-s3-level-ao {
+			regulator-name = "pm6150l_s3_level_ao";
+			qcom,set = <RPMH_REGULATOR_SET_ACTIVE>;
+			regulator-min-microvolt =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+			regulator-max-microvolt =
+				<RPMH_REGULATOR_LEVEL_MAX>;
+			qcom,init-voltage-level =
+				<RPMH_REGULATOR_LEVEL_RETENTION>;
+		};
+	};
+
+	rpmh-regulator-smpe8 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "smpe8";
+		S8E:
+		pm6150l_s8: regulator-pm6150l-s8 {
+			regulator-name = "pm6150l_s8";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1816000>;
+			regulator-max-microvolt = <2040000>;
+			qcom,init-voltage = <1872000>;
+		};
+	};
+
+	rpmh-regulator-ldoe1 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe1";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L1E:
+		pm6150l_l1: regulator-pm6150l-l1 {
+			regulator-name = "pm6150l_l1";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1620000>;
+			regulator-max-microvolt = <1980000>;
+			qcom,init-voltage = <1620000>;
+		};
+	};
+
+	rpmh-regulator-ldoe4 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe4";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L4E:
+		pm6150l_l4: regulator-pm6150l-l4 {
+			regulator-name = "pm6150l_l4";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <2700000>;
+			regulator-max-microvolt = <3300000>;
+			qcom,init-voltage = <2700000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldoe5 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe5";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L5E:
+		pm6150l_l5: regulator-pm6150l-l5 {
+			regulator-name = "pm6150l_l5";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1504000>;
+			regulator-max-microvolt = <3544000>;
+			qcom,init-voltage = <1504000>;
+		};
+	};
+
+	rpmh-regulator-ldoe6 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe6";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L6E:
+		pm6150l_l6: regulator-pm6150l-l6 {
+			regulator-name = "pm6150l_l6";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1650000>;
+			regulator-max-microvolt = <3300000>;
+			qcom,init-voltage = <1650000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldoe7 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe7";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L7E:
+		pm6150l_l7: regulator-pm6150l-l7 {
+			regulator-name = "pm6150l_l7";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3544000>;
+			qcom,init-voltage = <3000000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldoe8 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe8";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L8E:
+		pm6150l_l8: regulator-pm6150l-l8 {
+			regulator-name = "pm6150l_l8";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1620000>;
+			regulator-max-microvolt = <2000000>;
+			qcom,init-voltage = <1620000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldoe9 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe9";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L9E:
+		pm6150l_l9: regulator-pm6150l-l9 {
+			regulator-name = "pm6150l_l9";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <2700000>;
+			regulator-max-microvolt = <3544000>;
+			qcom,init-voltage = <2700000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldoe10 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe10";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L10E:
+		pm6150l_l10: regulator-pm6150l-l10 {
+			regulator-name = "pm6150l_l10";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3400000>;
+			qcom,init-voltage = <3000000>;
+			/*
+			 * Removed init-mode as it needs to be
+			 * set from client votes alone.
+			 */
+		};
+	};
+
+	rpmh-regulator-ldoe11 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldoe11";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L11E:
+		pm6150l_l11: regulator-pm6150l-l11 {
+			regulator-name = "pm6150l_l11";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3400000>;
+			qcom,init-voltage = <3000000>;
+		};
+	};
+
+	rpmh-regulator-ldog2 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldog2";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L2G:
+		pmr735a_l2: regulator-pmr735a-l2 {
+			regulator-name = "pmr735a_l2";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1140000>;
+			regulator-max-microvolt = <1236000>;
+			qcom,init-voltage = <1140000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldog3 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldog3";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L3G:
+		pmr735a_l3: regulator-pmr735a-l3 {
+			regulator-name = "pmr735a_l3";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <866000>;
+			regulator-max-microvolt = <939000>;
+			qcom,init-voltage = <866000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldog4 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldog4";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 10000>;
+		L4G:
+		pmr735a_l4: regulator-pmr735a-l4 {
+			regulator-name = "pmr735a_l4";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <1710000>;
+			regulator-max-microvolt = <1854000>;
+			qcom,init-voltage = <1710000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldog5 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldog5";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L5G:
+		pmr735a_l5: regulator-pmr735a-l5 {
+			regulator-name = "pmr735a_l5";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <760000>;
+			regulator-max-microvolt = <824000>;
+			qcom,init-voltage = <760000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-ldog6 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "ldog6";
+		qcom,regulator-type = "pmic5-ldo";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_LPM
+			RPMH_REGULATOR_MODE_HPM>;
+		qcom,mode-threshold-currents = <0 30000>;
+		L6G:
+		pmr735a_l6: regulator-pmr735a-l6 {
+			regulator-name = "pmr735a_l6";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <588000>;
+			regulator-max-microvolt = <800000>;
+			qcom,init-voltage = <588000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	rpmh-regulator-bobe1 {
+		compatible = "qcom,rpmh-vrm-regulator";
+		qcom,resource-name = "bobe1";
+		qcom,regulator-type = "pmic5-bob";
+		qcom,supported-modes =
+			<RPMH_REGULATOR_MODE_PASS
+			 RPMH_REGULATOR_MODE_AUTO>;
+		qcom,mode-threshold-currents = <0 1000000>;
+		qcom,send-defaults;
+
+		BOB: pm6150l_bob: regulator-pm6150l-bob {
+			regulator-name = "pm6150l_bob";
+			qcom,set = <RPMH_REGULATOR_SET_ALL>;
+			regulator-min-microvolt = <3008000>;
+			regulator-max-microvolt = <3960000>;
+			qcom,init-voltage = <3296000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_PASS>;
+		};
+
+		BOB_AO: pm6150l_bob_ao: regulator-pm6150l-bob-ao {
+			regulator-name = "pm6150l_bob_ao";
+			qcom,set = <RPMH_REGULATOR_SET_ACTIVE>;
+			regulator-min-microvolt = <3008000>;
+			regulator-max-microvolt = <3960000>;
+			qcom,init-voltage = <3296000>;
+			qcom,init-mode = <RPMH_REGULATOR_MODE_AUTO>;
+		};
+	};
+};

qcom/parrot-reserved-memory.dtsi

@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&reserved_memory {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	hyp_mem: hyp_region@80000000 {
+		no-map;
+		reg = <0x0 0x80000000 0x0 0x600000>;
+	};
+
+	xbl_dtlog_mem: xbl_dtlog_region@80600000 {
+		no-map;
+		reg = <0x0 0x80600000 0x0 0x40000>;
+	};
+
+	xbl_ramdump_mem: xbl_ramdump_region@80640000 {
+		no-map;
+		reg = <0x0 0x80640000 0x0 0x1c0000>;
+	};
+
+	aop_image_mem: aop_image_region@80800000 {
+		no-map;
+		reg = <0x0 0x80800000 0x0 0x60000>;
+	};
+
+	aop_cmd_db_mem: aop_cmd_db_region@80860000 {
+		compatible = "qcom,cmd-db";
+		no-map;
+		reg = <0x0 0x80860000 0x0 0x20000>;
+	};
+
+	aop_config_mem: aop_config_region@80880000 {
+		no-map;
+		reg = <0x0 0x80880000 0x0 0x20000>;
+	};
+
+	tme_crash_dump_mem: tme_crash_dump_region@808a0000 {
+		no-map;
+		reg = <0x0 0x808a0000 0x0 0x40000>;
+	};
+
+	tme_log_mem: tme_log_region@808e0000 {
+		no-map;
+		reg = <0x0 0x808e0000 0x0 0x4000>;
+	};
+
+	uefi_log_mem: uefi_log_region@808e4000 {
+		no-map;
+		reg = <0x0 0x808e4000 0x0 0x10000>;
+	};
+
+	smem_mem: smem_region@80900000 {
+		no-map;
+		reg = <0x0 0x80900000 0x0 0x200000>;
+	};
+
+	cpucp_fw_mem: cpucp_fw_region@80b00000 {
+		no-map;
+		reg = <0x0 0x80b00000 0x0 0x100000>;
+	};
+
+	chipinfo_mem: chipinfo_region@80c00000 {
+		no-map;
+		reg = <0x0 0x80c00000 0x0 0x1000>;
+	};
+
+	wlan_fw_mem: wlan_fw_region@82a00000 {
+		no-map;
+		reg = <0x0 0x82a00000 0x0 0xc00000>;
+	};
+
+	camera_mem: camera_region@84b00000 {
+		no-map;
+		reg = <0x0 0x84b00000 0x0 0x800000>;
+	};
+
+	wpss_mem: wpss_region@85300000 {
+		no-map;
+		reg = <0x0 0x85300000 0x0 0x1900000>;
+	};
+
+	video_mem: video_region@86c00000 {
+		no-map;
+		reg = <0x0 0x86c00000 0x0 0x700000>;
+	};
+
+	adsp_mem: adsp_region@87300000 {
+		no-map;
+		reg = <0x0 0x87300000 0x0 0x2100000>;
+	};
+
+	cdsp_mem: cdsp_region@89400000 {
+		no-map;
+		reg = <0x0 0x89400000 0x0 0xa00000>;
+	};
+
+	ipa_fw_mem: ipa_fw_region@89e00000 {
+		no-map;
+		reg = <0x0 0x89e00000 0x0 0x10000>;
+	};
+
+	ipa_gsi_mem: ipa_gsi_region@89e10000 {
+		no-map;
+		reg = <0x0 0x89e10000 0x0 0xa000>;
+	};
+
+	gpu_microcode_mem: gpu_microcode_region@89e1a000 {
+		no-map;
+		reg = <0x0 0x89e1a000 0x0 0x2000>;
+	};
+
+	mpss_mem: mpss_region@8bc00000 {
+		no-map;
+		reg = <0x0 0x8bc00000 0x0 0xe600000>;
+	};
+
+	xbl_sc_mem: xbl_sc_region@a6e00000 {
+		no-map;
+		reg = <0x0 0xa6e00000 0x0 0x40000>;
+	};
+
+	global_sync_mem: global_sync_region@a6f00000 {
+		no-map;
+		reg = <0x0 0xa6f00000 0x0 0x100000>;
+	};
+
+	cpusys_vm_mem: cpusys_vm_region@e0600000 {
+		no-map;
+		reg = <0x0 0xe0600000 0x0 0x400000>;
+	};
+
+	trust_ui_vm_mem: trust_ui_vm_region@e0b00000 {
+		no-map;
+		reg = <0x0 0xe0b00000 0x0 0x4af3000>;
+	};
+
+	trust_ui_vm_qrtr: trust_ui_vm_qrtr@e55f3000 {
+		no-map;
+		reg = <0x0 0xe55f3000 0x0 0x9000>;
+	};
+
+	trust_ui_vm_vblk0_ring: trust_ui_vm_vblk0_ring@e55fc000 {
+		no-map;
+		reg = <0x0 0xe55fc000 0x0 0x4000>;
+		gunyah-label = <0x11>;
+	};
+
+	trust_ui_vm_swiotlb: trust_ui_vm_swiotlb@e5600000 {
+		no-map;
+		reg = <0x0 0xe5600000 0x0 0x100000>;
+		gunyah-label = <0x12>;
+	};
+
+	tz_stat_mem: tz_stat_region@e8800000 {
+		no-map;
+		reg = <0x0 0xe8800000 0x0 0x100000>;
+	};
+
+	tags_mem: tags_region@e8900000 {
+		no-map;
+		reg = <0x0 0xe8900000 0x0 0x680000>;
+	};
+
+	qtee_mem: qtee_region@e8f80000 {
+		no-map;
+		reg = <0x0 0xe8f80000 0x0 0x500000>;
+	};
+
+	trusted_apps_mem: trusted_apps_region@e9480000 {
+		no-map;
+		reg = <0x0 0xe9480000 0x0 0x1200000>;
+	};
+};

qcom/parrot-rumi-overlay.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-wcn3990.dtsi"
+#include "parrot-rumi.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot RUMI";
+	compatible = "qcom,parrot-rumi", "qcom,parrot", "qcom,rumi";
+	qcom,msm-id = <537 0x10000>;
+	qcom,board-id = <0x1000F 0>;
+};

qcom/parrot-rumi.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/memreserve/ 0x90000000 0x00010000;
+
+#include "parrot.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-rumi.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot RUMI";
+	compatible = "qcom,parrot-rumi", "qcom,parrot", "qcom,rumi";
+	qcom,board-id = <0x1000F 0>;
+};

qcom/parrot-rumi.dtsi

@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/clock/qcom,gcc-parrot.h>
+#include <dt-bindings/gpio/gpio.h>
+
+&soc {
+	timer {
+		clock-frequency = <500000>;
+	};
+
+	timer@17420000 {
+		clock-frequency = <500000>;
+	};
+
+	qcom,wdt@17410000 {
+		status = "disabled";
+	};
+
+	usb_emuphy: phy@a784000 {
+		compatible = "qcom,usb-emu-phy";
+		reg = <0x0a784000 0x9500>;
+
+		qcom,emu-init-seq = <0xfffff 0x4
+		     0xffff0 0x4
+		     0x100000 0x20
+		     0x0 0x20
+		     0x000001A0 0x20
+		     0x00100000 0x3c
+		     0x0 0x3c
+		     0x0 0x4>;
+	};
+};
+
+&usb0 {
+	dwc3@a600000 {
+		usb-phy = <&usb_emuphy>, <&usb_nop_phy>;
+		dr_mode = "peripheral";
+		maximum-speed = "high-speed";
+	};
+};
+
+&sdhc_1 {
+	status = "disabled";
+
+	vdd-supply = <&L24B>;
+	qcom,vdd-voltage-level = <2960000 2960000>;
+	qcom,vdd-current-level = <0 570000>;
+
+	vdd-io-supply = <&L19B>;
+	qcom,vdd-io-always-on;
+	qcom,vdd-io-lpm-sup;
+	qcom,vdd-io-voltage-level = <1800000 1800000>;
+	qcom,vdd-io-current-level = <0 325000>;
+
+	/delete-property/ mmc-ddr-1_8v;
+	/delete-property/ mmc-hs200-1_8v;
+	/delete-property/ mmc-hs400-1_8v;
+	/delete-property/ mmc-hs400-enhanced-strobe;
+	max-frequency = <100000000>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc1_on>;
+	pinctrl-1 = <&sdc1_off>;
+};
+
+&sdhc_2 {
+	status = "ok";
+	vdd-supply = <&L9E>;
+	qcom,vdd-voltage-level = <2960000 2960000>;
+	qcom,vdd-current-level = <0 800000>;
+
+	vdd-io-supply = <&L6E>;
+	qcom,vdd-io-voltage-level = <2960000 2960000>;
+	qcom,vdd-io-current-level = <0 22000>;
+
+	is_rumi;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc2_on>;
+	pinctrl-1 = <&sdc2_off>;
+
+	cd-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
+};
+
+&ufsphy_mem {
+	compatible = "qcom,ufs-phy-qrbtc-sdm845";
+
+	vdda-phy-supply = <&L5B>;
+	vdda-pll-supply = <&L17B>;
+	vdda-phy-max-microamp = <85800>;
+	vdda-pll-max-microamp = <18300>;
+
+	status = "ok";
+};
+
+&ufshc_mem {
+	limit-tx-hs-gear = <1>;
+	limit-rx-hs-gear = <1>;
+	limit-rate = <2>; /* HS Rate-B */
+
+	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
+	vdd-hba-fixed-regulator;
+
+	vcc-supply = <&L24B>;
+	vcc-max-microamp = <1200000>;
+
+	vccq-supply = <&L13B>;
+	vccq-max-microamp = <1200000>;
+
+	vccq2-supply = <&L19B>;
+	vccq2-max-microamp = <750000>;
+
+	qcom,vddp-ref-clk-supply = <&L13B>;
+	qcom,vddp-ref-clk-max-microamp = <100>;
+
+	qcom,disable-lpm;
+	rpm-level = <0>;
+	spm-level = <0>;
+
+	status = "ok";
+};
+
+&qupv3_se3_2uart {
+	qcom,rumi_platform;
+};
+
+&tsens0 {
+	status = "disabled";
+};

qcom/parrot-sg-atp.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-sg-atp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG ATP";
+	compatible = "qcom,parrot-atp", "qcom,parrot", "qcom,atp";
+	qcom,board-id = <33 0>;
+};

qcom/parrot-sg-atp.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-atp.dtsi"

qcom/parrot-sg-idp-nopmi.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-sg-idp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0>;
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+};

qcom/parrot-sg-idp-pm8350b.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-sg-idp.dtsi"
+#include "parrot-idp-pm8350b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0>;
+};

qcom/parrot-sg-idp-wcn3990-amoled-rcm.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-sg-idp-wcn3990-amoled-rcm.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG WCN3990 IDP + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 3>;
+};

qcom/parrot-sg-idp-wcn3990-amoled-rcm.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp-wcn3990-amoled-rcm.dtsi"

qcom/parrot-sg-idp-wcn3990.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-sg-idp-wcn3990.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG IDP + WCN3990";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 1>;
+};

qcom/parrot-sg-idp-wcn3990.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp-wcn3990.dtsi"

qcom/parrot-sg-idp-wcn6750-amoled-rcm.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-sg-idp-wcn6750-amoled-rcm.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG WCN6750 IDP + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 2>;
+};

qcom/parrot-sg-idp-wcn6750-amoled-rcm.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp-wcn6750-amoled-rcm.dtsi"

qcom/parrot-sg-idp-wcn6750-amoled.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-sg-idp-wcn6750-amoled.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG WCN6750 IDP + AMOLED";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 4>;
+};

qcom/parrot-sg-idp-wcn6750-amoled.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp-wcn6750-amoled.dtsi"

qcom/parrot-sg-idp.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-sg-idp.dtsi"
+#include "parrot-idp-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,board-id = <34 0>;
+};

qcom/parrot-sg-idp.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-idp.dtsi"

qcom/parrot-sg-qrd-nopmi.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-sg-qrd.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+	qcom,pmic-id-size = <9>;
+	qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+};

qcom/parrot-sg-qrd-pm8350b.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-sg-qrd.dtsi"
+#include "parrot-qrd-pm8350b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+};

qcom/parrot-sg-qrd-wcn6750.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn6750.dtsi"
+#include "parrot-sg-qrd-wcn6750.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG WCN6750 QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 1>;
+};

qcom/parrot-sg-qrd-wcn6750.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-qrd-wcn6750.dtsi"

qcom/parrot-sg-qrd.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+#include "parrot-wcn3990.dtsi"
+#include "parrot-sg-qrd.dtsi"
+#include "parrot-qrd-pm7250b.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+};

qcom/parrot-sg-qrd.dtsi

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot-qrd.dtsi"

qcom/parrot-sg.dts

@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "parrot-sg.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SG SoC";
+	compatible = "qcom,parrot";
+	qcom,board-id = <0 0>;
+};

qcom/parrot-sg.dtsi

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "parrot.dtsi"
+
+/ {
+
+	model = "Qualcomm Technologies, Inc. Parrot SG";
+	compatible = "qcom,parrot";
+	qcom,msm-id = <633 0x10000>;
+};
+
+&msm_gpu {
+	/delete-property/qcom,gpu-model;
+	qcom,gpu-model = "AdrenoA21v1";
+};

qcom/parrot-stub-regulator.dtsi

@@ -0,0 +1,499 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
+
+/ {
+	VDD_CX_LEVEL:
+	S1B_LEVEL:
+	pm6xxx_s1_level: regulator-pm6xxx-s1-level {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_s1_level";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt =
+			<RPMH_REGULATOR_LEVEL_RETENTION>;
+		regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+	};
+
+	VDD_GFX_LEVEL:
+	S3B_LEVEL:
+	pm6xxx_s3_level: regulator-pm6xxx-s3-level {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_s3_level";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt =
+			<RPMH_REGULATOR_LEVEL_RETENTION>;
+		regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+	};
+
+	VDD_EBI_LEVEL:
+	S5B_LEVEL:
+	pm6xxx_s5_level: regulator-pm6xxx-s5-level {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_s5_level";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt =
+			<RPMH_REGULATOR_LEVEL_RETENTION>;
+		regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+	};
+
+	S6B:
+	pm6xxx_s6: regulator-pm6xxx-s6 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_s6";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1010000>;
+		regulator-max-microvolt = <1170000>;
+	};
+
+	S7B:
+	pm6xxx_s7: regulator-pm6xxx-s7 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_s7";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <418000>;
+		regulator-max-microvolt = <1174000>;
+	};
+
+	S8B:
+	pm6xxx_s8: regulator-pm6xxx-s8 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_s8";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <382000>;
+		regulator-max-microvolt = <1654000>;
+	};
+
+	S9B:
+	pm6xxx_s9: regulator-pm6xxx-s9 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_s9";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1710000>;
+		regulator-max-microvolt = <2200000>;
+	};
+
+	L1B:
+	pm6xxx_l1: regulator-pm6xxx-l1 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l1";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <312000>;
+		regulator-max-microvolt = <650000>;
+	};
+
+	VDD_LPI_CX_LEVEL:
+	L2B_LEVEL:
+	pm6xxx_l2_level: regulator-pm6xxx-l2-level {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l2_level";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt =
+			<RPMH_REGULATOR_LEVEL_RETENTION>;
+		regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+	};
+
+	L3B:
+	pm6xxx_l3: regulator-pm6xxx-l3 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l3";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <870000>;
+		regulator-max-microvolt = <970000>;
+	};
+
+	L4B:
+	pm6xxx_l4: regulator-pm6xxx-l4 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l4";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <530000>;
+		regulator-max-microvolt = <864000>;
+	};
+
+	L5B:
+	pm6xxx_l5: regulator-pm6xxx-l5 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l5";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <830000>;
+		regulator-max-microvolt = <920000>;
+	};
+
+	L6B:
+	pm6xxx_l6: regulator-pm6xxx-l6 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l6";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <751000>;
+		regulator-max-microvolt = <824000>;
+	};
+
+	L7B:
+	pm6xxx_l7: regulator-pm6xxx-l7 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l7";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <830000>;
+		regulator-max-microvolt = <920000>;
+	};
+
+	L8B:
+	pm6xxx_l8: regulator-pm6xxx-l8 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l8";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <870000>;
+		regulator-max-microvolt = <970000>;
+	};
+
+	VDD_LPI_MX_LEVEL:
+	L9B_LEVEL:
+	pm6xxx_l9_level: regulator-pm6xxx-l9-level {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l9_level";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt =
+			<RPMH_REGULATOR_LEVEL_RETENTION>;
+		regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+	};
+
+	L10B:
+	pm6xxx_l10: regulator-pm6xxx-l10 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l10";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <824000>;
+		regulator-max-microvolt = <950000>;
+	};
+
+	L11B:
+	pm6xxx_l11: regulator-pm6xxx-l11 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l11";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <348000>;
+		regulator-max-microvolt = <888000>;
+	};
+
+	L12B:
+	pm6xxx_l12: regulator-pm6xxx-l12 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l12";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <1080000>;
+		regulator-max-microvolt = <1304000>;
+	};
+
+	L13B:
+	pm6xxx_l13: regulator-pm6xxx-l13 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l13";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <1080000>;
+		regulator-max-microvolt = <1304000>;
+	};
+
+	L14B:
+	pm6xxx_l14: regulator-pm6xxx-l14 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l14";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <1150000>;
+		regulator-max-microvolt = <1304000>;
+	};
+
+	L15B:
+	pm6xxx_l15: regulator-pm6xxx-l15 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l15";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <312000>;
+		regulator-max-microvolt = <1304000>;
+	};
+
+	L16B:
+	pm6xxx_l16: regulator-pm6xxx-l16 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l16";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <1140000>;
+		regulator-max-microvolt = <1260000>;
+	};
+
+	L17B:
+	pm6xxx_l17: regulator-pm6xxx-l17 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l17";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <1170000>;
+		regulator-max-microvolt = <1304000>;
+	};
+
+	L18B:
+	pm6xxx_l18: regulator-pm6xxx-l18 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l18";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1504000>;
+		regulator-max-microvolt = <2000000>;
+	};
+
+	L19B:
+	pm6xxx_l19: regulator-pm6xxx-l19 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l19";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1620000>;
+		regulator-max-microvolt = <1980000>;
+	};
+
+	L20B:
+	pm6xxx_l20: regulator-pm6xxx-l20 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l20";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1700000>;
+		regulator-max-microvolt = <1900000>;
+	};
+
+	L21B:
+	pm6xxx_l21: regulator-pm6xxx-l21 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l21";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1504000>;
+		regulator-max-microvolt = <1950000>;
+	};
+
+	L22B:
+	pm6xxx_l22: regulator-pm6xxx-l22 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l22";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1504000>;
+		regulator-max-microvolt = <2000000>;
+	};
+
+	L23B:
+	pm6xxx_l23: regulator-pm6xxx-l23 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l23";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1650000>;
+		regulator-max-microvolt = <1950000>;
+	};
+
+	L24B:
+	pm6xxx_l24: regulator-pm6xxx-l24 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l24";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <2400000>;
+		regulator-max-microvolt = <3544000>;
+	};
+
+	L25B:
+	pm6xxx_l25: regulator-pm6xxx-l25 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l25";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <2700000>;
+		regulator-max-microvolt = <3544000>;
+	};
+
+	L26B:
+	pm6xxx_l26: regulator-pm6xxx-l26 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l26";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1620000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	L27B:
+	pm6xxx_l27: regulator-pm6xxx-l27 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l27";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1620000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	L28B:
+	pm6xxx_l28: regulator-pm6xxx-l28 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6xxx_l28";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <2700000>;
+		regulator-max-microvolt = <3544000>;
+	};
+
+	VDD_MODEM_LEVEL:
+	S1E_LEVEL:
+	pm6150l_s1_level: regulator-pm6150l-s1-level {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_s1_level";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt =
+			<RPMH_REGULATOR_LEVEL_RETENTION>;
+		regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+	};
+
+	VDD_MXA_LEVEL:
+	S3E_LEVEL:
+	pm6150l_s3_level: regulator-pm6150l-s3-level {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_s3_level";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt =
+			<RPMH_REGULATOR_LEVEL_RETENTION>;
+		regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
+	};
+
+	S8E:
+	pm6150l_s8: regulator-pm6150l-s8 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_s8";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1700000>;
+		regulator-max-microvolt = <2040000>;
+	};
+
+	L1E:
+	pm6150l_l1: regulator-pm6150l-l1 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l1";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1620000>;
+		regulator-max-microvolt = <1980000>;
+	};
+
+	L4E:
+	pm6150l_l4: regulator-pm6150l-l4 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l4";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <2700000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	L5E:
+	pm6150l_l5: regulator-pm6150l-l5 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l5";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1504000>;
+		regulator-max-microvolt = <3544000>;
+	};
+
+	L6E:
+	pm6150l_l6: regulator-pm6150l-l6 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l6";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1650000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	L7E:
+	pm6150l_l7: regulator-pm6150l-l7 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l7";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <3000000>;
+		regulator-max-microvolt = <3544000>;
+	};
+
+	L8E:
+	pm6150l_l8: regulator-pm6150l-l8 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l8";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1620000>;
+		regulator-max-microvolt = <2000000>;
+	};
+
+	L9E:
+	pm6150l_l9: regulator-pm6150l-l9 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l9";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <2700000>;
+		regulator-max-microvolt = <3544000>;
+	};
+
+	L10E:
+	pm6150l_l10: regulator-pm6150l-l10 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l10";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <3000000>;
+		regulator-max-microvolt = <3400000>;
+	};
+
+	L11E:
+	pm6150l_l11: regulator-pm6150l-l11 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_l11";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <3000000>;
+		regulator-max-microvolt = <3400000>;
+	};
+
+	BOB:
+	pm6150l_bob: regulator-pm6150l-bob {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pm6150l_bob";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <2000000>;
+		regulator-max-microvolt = <5500000>;
+	};
+
+	L2G:
+	pmr735a_l2: regulator-pmr735a-l2 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pmr735a_l2";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <1140000>;
+		regulator-max-microvolt = <1236000>;
+	};
+
+	L3G:
+	pmr735a_l3: regulator-pmr735a-l3 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pmr735a_l3";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <830000>;
+		regulator-max-microvolt = <939000>;
+	};
+
+	L4G:
+	pmr735a_l4: regulator-pmr735a-l4 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pmr735a_l4";
+		qcom,hpm-min-load = <10000>;
+		regulator-min-microvolt = <1710000>;
+		regulator-max-microvolt = <1854000>;
+	};
+
+	L5G:
+	pmr735a_l5: regulator-pmr735a-l5 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pmr735a_l5";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <760000>;
+		regulator-max-microvolt = <824000>;
+	};
+
+	L6G:
+	pmr735a_l6: regulator-pmr735a-l6 {
+		compatible = "qcom,stub-regulator";
+		regulator-name = "pmr735a_l6";
+		qcom,hpm-min-load = <30000>;
+		regulator-min-microvolt = <588000>;
+		regulator-max-microvolt = <800000>;
+	};
+};

qcom/parrot-thermal-overlay.dtsi

@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/thermal/thermal_qti.h>
+
+&thermal_zones {
+	pm6150l-bcl-lvl0 {
+		cooling-maps {
+			vph_lte0 {
+				trip = <&l_bcl_lvl0>;
+				cooling-device = <&modem_lte_dsc 8 8>;
+			};
+
+			vph_nr0_scg {
+				trip = <&l_bcl_lvl0>;
+				cooling-device = <&modem_nr_scg_dsc 3 3>;
+			};
+
+			vph_nr0 {
+				trip = <&l_bcl_lvl0>;
+				cooling-device = <&modem_nr_dsc 6 6>;
+			};
+
+			vph_cdsp0 {
+				trip = <&l_bcl_lvl0>;
+				cooling-device = <&cdsp_sw 2 2>;
+			};
+
+			vph_cpu_5 {
+				trip = <&l_bcl_lvl0>;
+				cooling-device = <&cpu5_pause 1 1>;
+			};
+
+			vph_gpu0 {
+				trip = <&l_bcl_lvl0>;
+				cooling-device = <&msm_gpu 1 1>;
+			};
+		};
+	};
+
+	pm6150l-bcl-lvl1 {
+		cooling-maps {
+			vph_lte1 {
+				trip = <&l_bcl_lvl1>;
+				cooling-device = <&modem_lte_dsc 10 10>;
+			};
+
+			vph_nr1_scg {
+				trip = <&l_bcl_lvl1>;
+				cooling-device = <&modem_nr_scg_dsc 10 10>;
+			};
+
+			vph_nr1 {
+				trip = <&l_bcl_lvl1>;
+				cooling-device = <&modem_nr_dsc 9 9>;
+			};
+
+			vph_cdsp1 {
+				trip = <&l_bcl_lvl1>;
+				cooling-device = <&cdsp_sw 4 4>;
+			};
+
+			vph_cpu_6_7 {
+				trip = <&l_bcl_lvl1>;
+				cooling-device = <&cpu_6_7_pause 1 1>;
+			};
+
+			vph_gpu1 {
+				trip = <&l_bcl_lvl1>;
+				cooling-device = <&msm_gpu 2 2>;
+			};
+		};
+	};
+
+	pm6150l-bcl-lvl2 {
+		cooling-maps {
+			vph_cdsp2 {
+				trip = <&l_bcl_lvl2>;
+				cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
+			};
+
+			vph_gpu2 {
+				trip = <&l_bcl_lvl2>;
+				cooling-device = <&msm_gpu 3 THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+
+	pm6450_tz {
+		cooling-maps {
+			pm6450_gpu {
+				trip = <&pm6450_trip0>;
+				cooling-device = <&msm_gpu 3 THERMAL_NO_LIMIT>;
+			};
+
+			pm6450_cdsp {
+				trip = <&pm6450_trip0>;
+				cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+
+	pm6150l_tz {
+		cooling-maps {
+			pm6150l_lte {
+				trip = <&pm6150l_trip0>;
+				cooling-device = <&modem_lte_dsc 255 255>;
+			};
+
+			pm6150l_nr {
+				trip = <&pm6150l_trip0>;
+				cooling-device = <&modem_nr_scg_dsc 255 255>;
+			};
+
+			pm6150l_cpu0 {
+				trip = <&pm6150l_trip0>;
+				cooling-device = <&cpu0_pause 1 1>;
+			};
+
+			pm6150l_cpu1 {
+				trip = <&pm6150l_trip0>;
+				cooling-device = <&cpu1_pause 1 1>;
+			};
+
+			pm6150l_cpu2 {
+				trip = <&pm6150l_trip0>;
+				cooling-device = <&cpu2_pause 1 1>;
+			};
+
+			pm6150l_cpu3 {
+				trip = <&pm6150l_trip0>;
+				cooling-device = <&cpu3_pause 1 1>;
+			};
+
+			pm6150l_apc1 {
+				trip = <&pm6150l_trip0>;
+				cooling-device = <&APC1_pause 1 1>;
+			};
+		};
+	};
+};