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ARM: dts: msm: add disp_cc io to sde cesta

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To enable and disable mdp clock gating functionality with
cesta immediate vote approach, add disp_cc_io memory to
sde cesta.

Change-Id: I2bd6d80269a69d870f2c8b4ff0b1bf8b1270aa6f
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This commit is contained in:
Jayaprakash Madisetty
2025-01-10 16:35:04 +05:30
committed by lnxdisplay
parent 8aebb5a491
commit d56825f5c4
1 changed files with 4 additions and 3 deletions
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7
display/sun-sde.dtsi
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@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
@@ -222,8 +222,9 @@
<0xaf33000 0x30>, <0xaf33000 0x30>,
<0xaf34000 0x30>, <0xaf34000 0x30>,
<0xaf35000 0x30>, <0xaf35000 0x30>,
<0xaf36000 0x30>; <0xaf36000 0x30>,
reg-names = "rscc", "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5"; <0xaf0f000 0x10>;
reg-names = "rscc", "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5", "disp_cc";
clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK_SRC>, <&dispcc DISP_CC_MDSS_MDP_CLK_SRC>,