dt-bindings: input: Add bindings for qpnp-power-on driver
Add devicetree bindings for the qpnp-power-on driver. Change-Id: Iee410aadc78d66af49cee49bbbf10cff79d94d64 Signed-off-by: Varshitha H N <quic_vhn@quicinc.com>
This commit is contained in:
Varshitha H N
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bindings/input/qcom,qpnp-power-on.yaml
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317
bindings/input/qcom,qpnp-power-on.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/input/qcom,qpnp-power-on.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. QPNP Power-on PMIC Peripheral
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maintainers:
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- David Collins <quic_collinsd@quicinc.com>
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description: >
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qpnp-power-on devices support the power-on (PON) peripheral found on
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Qualcomm Technologies, Inc. PMICs. The supported functionality includes power
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on/off reason, kerelease detection, PMIC reset configurations and other
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PON specific features. The PON module supports multiple physical power-on
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(KPDPWR_N, CBLPWR) and reset (KPDPWR_N, RESIN, KPDPWR+RESIN) sources. This
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peripheral is connected to the host processor via the SPMI interface.y press/
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properties:
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compatible:
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const: qcom,qpnp-power-on
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reg:
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description: Specifies the SPMI base address for this
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PON (power-on) peripheral. For PMICs that have
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PON peripheral (GEN3) split into PON_HLOS and
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PON_PBS, this can hold addresses of both.
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PON_PBS base address needs to be specified for
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such devices if "qcom,kdpwr-sw-debounce" is specified.
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reg-names:
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description: For PON GEN1 and GEN2, it should be "pon".
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and for PON GEN3, it should include "pon_hlos" and
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optionally "pon_pbs".
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interrupts:
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description: Specifies the interrupts associated with PON.
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interrupt-names:
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description: Specifies the interrupt names associated with
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the interrupts property. Must be a subset of
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"kpdpwr", "kpdpwr-bark", "resin", "resin-bark",
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"cblpwr", "kpdpwr-resin-bark", and
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"pmic-wd-bark". Bark interrupts are associated
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with system reset configuration to allow default
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reset configuration to be activated. If system
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reset configuration is not supported then bark
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interrupts are nops. Additionally, the
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"pmic-wd-bark" interrupt can be added if the
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system needs to handle PMIC watchdog barks.
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qcom,pon-dbc-delay:
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description: The debounce delay for the power-key interrupt
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specified in us.
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Possible values for GEN1 PON are
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15625, 31250, 62500, 125000, 250000, 500000,
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1000000 and 2000000.
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Possible values for GEN2 PON are
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62, 123, 245, 489, 977, 1954, 3907, 7813,
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15625, 31250, 62500, 125000 and 250000.
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Intermediate value is rounded down to the
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nearest valid value.
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$ref: /schemas/types.yaml#/definitions/uint32
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qcom,system-reset:
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description: Boolean which specifies that this PON peripheral
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can be used to reset the system. This property
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can only be used by one device on the system. It
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is an error to include it more than once.
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type: boolean
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qcom,modem-reset:
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description: Boolean which specifies that this PON peripheral
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can be used to reset the attached modem chip.
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This property can only be used by one PON device
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on the system. qcom,modem-reset and
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qcom,system-reset cannot be specified for the
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same PON device.
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type: boolean
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qcom,s3-debounce:
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description: The debounce delay for stage 3 reset trigger in
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secs. The values range from 0 to 128.
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$ref: /schemas/types.yaml#/definitions/uint32
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qcom,s3-src:
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description: The source for stage 3 reset. It can be one of
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"kpdpwr", "resin", "kpdpwr-or-resin" or
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"kpdpwr-and-resin".
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$ref: /schemas/types.yaml#/definitions/uint32
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qcom,clear-warm-reset:
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description: Boolean which specifies that the WARM_RESET
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reason registers need to be cleared for this
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target. The property is used for the targets
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which have a hardware feature to catch resets
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which aren't triggered by the application
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processor. In such cases clearing WARM_REASON
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registers across processor resets keeps the
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registers in a useful state.
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type: boolean
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qcom,secondary-pon-reset:
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description: Boolean property which indicates that the PON
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peripheral is a secondary PON device which
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needs to be configured during reset in addition
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to the primary PON device that is configured
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for system reset through qcom,system-reset
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property.
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This should not be defined along with the
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qcom,system-reset or qcom,modem-reset property.
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type: boolean
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qcom,store-hard-reset-reason:
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description: Boolean property which if set will store the
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hardware reset reason to SOFT_RB_SPARE register
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of the core PMIC PON peripheral.
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type: boolean
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qcom,hard-reset-poweroff-type:
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description: Same description as
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qcom,warm-reset-poweroff-type but this applies
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for the system hard reset case.
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type: boolean
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qcom,kpdpwr-sw-debounce:
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description: Boolean property to enable the debounce logic
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on the KPDPWR_N rising edge.
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type: boolean
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qcom,pon_X:
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description: These PON child nodes correspond to features
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supported by the PON peripheral including reset
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configurations, pushbutton keys, and regulators.
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type: boolean
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required:
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- compatible
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- reg
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patternProperties:
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"^pon-[0-9]+$":
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type: object
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$ref: input.yaml#
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unevaluatedProperties: false
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properties:
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regulator-name:
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description: Regulator name for the PON regulator that is being configured.
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qcom,pon-spare-reg-addr:
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description: Register offset from the base address of the
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PON peripheral that needs to be configured for
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the regulator being controlled.
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$ref: /schemas/types.yaml#/definitions/uint32
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qcom,pon-spare-reg-bit:
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description: Bit position in the specified register that
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needs to be configured for the regulator being
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controlled.
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$ref: /schemas/types.yaml#/definitions/uint32
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qcom,pon-type:
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description: The type of PON/RESET source. Supported values are
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0 = KPDPWR
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1 = RESIN
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2 = CBLPWR
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3 = KPDPWR_RESIN
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These values are PON_POWER_ON_TYPE_* found in
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include/dt-bindings/input/qcom,qpnp-power-on.h
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$ref: /schemas/types.yaml#/definitions/uint32
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qcom,pull-up:
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description: Boolean flag indicating if a pull-up resistor
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should be enabled for the input.
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type: boolean
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qcom,support-reset:
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description: Indicates if this PON source supports
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reset functionality.
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0 = Not supported
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1 = Supported
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If this property is not defined, then default S2
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reset configurations should not be modified.
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type: boolean
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qcom,use-bark:
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description: Specify if this PON type needs to handle a bark
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interrupt.
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type: boolean
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linux,code:
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description: The input key-code associated with the reset
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source. The reset source in its default
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configuration can be used to support standard keys.
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qcom,s1-timer:
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description: The debounce timer for the BARK interrupt for
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the reset source. Value is specified in ms.
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Supported values are
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0, 32, 56, 80, 128, 184, 272, 408, 608, 904,
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1352, 2048, 3072, 4480, 6720, 10256
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type: boolean
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qcom,s2-timer:
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description: The debounce timer for the S2 reset specified
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in ms. On the expiry of this timer, the PMIC
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executes the reset sequence.
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Supported values are
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0, 10, 50, 100, 250, 500, 1000, 2000
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type: boolean
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qcom,s2-type:
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description: The type of reset associated with this source.
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Supported values
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0 = SOFT_RESET (legacy)
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1 = WARM_RESET
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4 = SHUTDOWN
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5 = DVDD_SHUTDOWN
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7 = HARD_RESET
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8 = DVDD_HARD_RESET
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These values are PON_POWER_OFF_TYPE_* found in
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include/dt-bindings/input/qcom,qpnp-power-on.h
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$ref: /schemas/types.yaml#/definitions/uint32
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required:
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- regulator-name
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- qcom,pon-spare-reg-addr
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- qcom,pon-spare-reg-bit
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- qcom,pon-type
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- qcom,s1-timer
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- qcom,s2-timer
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- qcom,s2-type
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additionalProperties: false
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allOf:
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- $ref: input.yaml#
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additionalProperties: false
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examples:
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- |
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qcom,power-on@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>,
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<0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>,
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<0x0 0x8 0x4 IRQ_TYPE_EDGE_RISING>,
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<0x0 0x8 0x5 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "kpdpwr", "resin", "resin-bark",
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"kpdpwr-resin-bark";
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qcom,pon-dbc-delay = <15625>;
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qcom,system-reset;
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qcom,s3-debounce = <32>;
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qcom,s3-src = "resin";
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qcom,clear-warm-reset;
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qcom,store-hard-reset-reason;
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qcom,pon_1 {
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qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>;
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qcom,pull-up;
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linux,code = <KEY_POWER>;
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};
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qcom,pon_2 {
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qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>;
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qcom,support-reset = <1>;
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qcom,pull-up;
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qcom,s1-timer = <0>;
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qcom,s2-timer = <2000>;
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qcom,s2-type = <PON_POWER_OFF_TYPE_WARM_RESET>;
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linux,code = <KEY_VOLUMEDOWN>;
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qcom,use-bark;
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};
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qcom,pon_3 {
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qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR_RESIN>;
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qcom,support-reset = <1>;
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qcom,s1-timer = <6720>;
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qcom,s2-timer = <2000>;
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qcom,s2-type = <PON_POWER_OFF_TYPE_HARD_RESET>;
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qcom,pull-up;
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qcom,use-bark;
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};
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};
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- |
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qcom,power-on@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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qcom,secondary-pon-reset;
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qcom,hard-reset-poweroff-type = <PON_POWER_OFF_TYPE_SHUTDOWN>;
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pon_perph_reg:qcom,pon_perph_reg {
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regulator-name = "pon_spare_reg";
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qcom,pon-spare-reg-addr = <0x8c>;
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qcom,pon-spare-reg-bit = <1>;
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};
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};
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- |
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pon_hlos@1300 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x1300>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>
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<0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
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interrupt-names = "kpdpwr", "resin";
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qcom,kpdpwr-sw-debounce;
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qcom,pon_1 {
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qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>;
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linux,code = <KEY_POWER>;
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};
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qcom,pon_2 {
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qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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...
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