ARM: dts: msm: Add NFC device node for ravelin
Device node changes required on ravelin, describing the GPIO configuration for Nfc controller chip. Modified corresponding Nfc device node for ATP, IDP & QRD platforms Change-Id: I331d0ad5aff3cd51bff5cf5268fbfe58c71d8280
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7
Kbuild
7
Kbuild
@@ -21,6 +21,13 @@ dtbo-y += nxp/parrot-nfc.dtbo \
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nxp/parrot-nfc-atp.dtbo
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endif
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ifeq ($(CONFIG_ARCH_RAVELIN),y)
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dtbo-y += nxp/ravelin-nfc.dtbo \
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nxp/ravelin-nfc-qrd.dtbo \
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nxp/ravelin-nfc-idp.dtbo \
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nxp/ravelin-nfc-atp.dtbo
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endif
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always-y := $(dtb-y) $(dtbo-y)
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subdir-y := $(dts-dirs)
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clean-files := *.dtb *.dtbo
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17
nxp/ravelin-nfc-atp.dts
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17
nxp/ravelin-nfc-atp.dts
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@@ -0,0 +1,17 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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/plugin/;
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#include "ravelin-nfc-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Ravelin ATP";
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compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp";
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qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>, <663 0x10000>;
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qcom,board-id = <33 0>;
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};
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28
nxp/ravelin-nfc-common.dtsi
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28
nxp/ravelin-nfc-common.dtsi
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@@ -0,0 +1,28 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&qupv3_se0_i2c {
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status = "ok";
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qcom,clk-freq-out = <1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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nq@28 {
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compatible = "qcom,sn-nci";
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reg = <0x28>;
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qcom,sn-irq = <&tlmm 9 0x00>;
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qcom,sn-ven = <&tlmm 6 0x00>;
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qcom,sn-clkreq = <&tlmm 7 0x00>;
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qcom,sn-vdd-1p8-supply = <&L21B>;
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qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
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qcom,sn-vdd-1p8-current = <157000>;
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interrupt-parent = <&tlmm>;
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interrupts = <9 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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17
nxp/ravelin-nfc-idp.dts
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17
nxp/ravelin-nfc-idp.dts
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@@ -0,0 +1,17 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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/plugin/;
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#include "ravelin-nfc-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Ravelin IDP";
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compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
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qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>, <663 0x10000>;
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qcom,board-id = <34 0>;
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};
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66
nxp/ravelin-nfc-pinctrl.dtsi
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66
nxp/ravelin-nfc-pinctrl.dtsi
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@@ -0,0 +1,66 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&tlmm {
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nfc {
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nfc_int_active: nfc_int_active {
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/* active state */
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mux {
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/* NFC Read Interrupt */
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pins = "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>; /* 2 MA */
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bias-pull-down;
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};
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};
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nfc_int_suspend: nfc_int_suspend {
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/* sleep state */
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mux {
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/* NFC Read Interrupt */
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pins = "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>; /* 2 MA */
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bias-pull-down;
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};
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};
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nfc_enable_active: nfc_enable_active {
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mux {
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/* Enable and Clock request gpios */
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pins = "gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio6", "gpio7";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_enable_suspend: nfc_enable_suspend {
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mux {
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pins = "gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio6", "gpio7";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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}; //nfc
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}; //tlmm
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18
nxp/ravelin-nfc-qrd.dts
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18
nxp/ravelin-nfc-qrd.dts
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@@ -0,0 +1,18 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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/plugin/;
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#include "ravelin-nfc-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Ravelin QRD";
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compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
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qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, <653 0x10000>,
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<654 0x10000>, <663 0x10000>;
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qcom,board-id = <0x1000B 0>;
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};
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17
nxp/ravelin-nfc.dts
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17
nxp/ravelin-nfc.dts
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@@ -0,0 +1,17 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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/plugin/;
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#include "ravelin-nfc-pinctrl.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Ravelin SoC";
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compatible = "qcom,ravelin";
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qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, <653 0x10000>,
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<654 0x10000>, <663 0x10000>;
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qcom,board-id = <0 0>;
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};
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