Device node changes required on ravelin, describing the GPIO configuration for Nfc controller chip. Modified corresponding Nfc device node for ATP, IDP & QRD platforms Change-Id: I331d0ad5aff3cd51bff5cf5268fbfe58c71d8280
29 lines
752 B
Plaintext
29 lines
752 B
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&qupv3_se0_i2c {
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status = "ok";
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qcom,clk-freq-out = <1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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nq@28 {
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compatible = "qcom,sn-nci";
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reg = <0x28>;
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qcom,sn-irq = <&tlmm 9 0x00>;
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qcom,sn-ven = <&tlmm 6 0x00>;
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qcom,sn-clkreq = <&tlmm 7 0x00>;
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qcom,sn-vdd-1p8-supply = <&L21B>;
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qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
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qcom,sn-vdd-1p8-current = <157000>;
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interrupt-parent = <&tlmm>;
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interrupts = <9 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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