ARM: dts: qcom: Add support for cache-controller for Tuna
Add support for LLCC for Tuna SoC in devicetree. Also, add corresponding DT compatible string in bindings. Change-Id: I16978c988bf691cf350a21edffc28084fa01c6e9 Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
This commit is contained in:
committed by
Vishvanath Singh
parent
17b320bdf1
commit
b7a42a08f0
@@ -36,6 +36,7 @@ properties:
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- qcom,pineapple-llcc
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- qcom,pineapple-llcc
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- qcom,sun-llcc
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- qcom,sun-llcc
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- qcom,sdxpinn-llcc
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- qcom,sdxpinn-llcc
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- qcom,tuna-llcc
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- qcom,kera-llcc
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- qcom,kera-llcc
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- qcom,x1e80100-llcc
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- qcom,x1e80100-llcc
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@@ -510,6 +510,20 @@
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};
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};
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};
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};
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cache-controller@24800000 {
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compatible = "qcom,tuna-llcc";
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reg = <0x24800000 0x200000>, <0x25800000 0x200000>,
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<0x24C00000 0x200000>, <0x25C00000 0x200000>,
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<0x26800000 0x200000>, <0x26C00000 0x200000>;
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reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
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"llcc3_base", "llcc_broadcast_or_base",
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"llcc_broadcast_and_base";
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interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
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cap-based-alloc-and-pwr-collapse;
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};
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apps_rsc: rsc@17a00000 {
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apps_rsc: rsc@17a00000 {
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label = "apps_rsc";
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label = "apps_rsc";
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compatible = "qcom,rpmh-rsc";
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compatible = "qcom,rpmh-rsc";
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