ARM: dts: msm: Use "iommu-addresses" property for parrot qup

Use upstream compatible DT property "iommu-addresses" instead
of "qcom,iommu-dma-addr-pool" for qup which describes the
addresses that qup cannot use.

Change-Id: I3d678df7b9ee4687e86bc7eb914235a780deec0c
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
This commit is contained in:
Saranya R
2024-05-27 13:02:12 +05:30
parent 8698a0c9f5
commit b2b3ef52b1

View File

@@ -19,6 +19,13 @@
* Qup1 5: SE 11
*/
qup_iommu_region: qup_iommu_region {
iommu-addresses = <&gpi_dma0 0x0 0x100000>, <&gpi_dma0 0x200000 0xffe00000>,
<&qupv3_0 0x0 0x40000000>, <&qupv3_0 0x50000000 0xb0000000>,
<&gpi_dma1 0x0 0x100000>, <&gpi_dma1 0x200000 0xffe00000>,
<&qupv3_1 0x0 0x40000000>, <&qupv3_1 0x50000000 0xb0000000>;
};
/* GPI Instance */
gpi_dma0: qcom,gpi-dma@900000 {
compatible = "qcom,gpi-dma";
@@ -41,7 +48,7 @@
<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
qcom,gpii-mask = <0x3f>;
qcom,ev-factor = <2>;
qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
memory-region = <&qup_iommu_region>;
dma-coherent;
qcom,gpi-ee-offset = <0x10000>;
status = "ok";
@@ -57,7 +64,7 @@
clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
iommus = <&apps_smmu 0x163 0x0>;
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
memory-region = <&qup_iommu_region>;
qcom,iommu-geometry = <0x40000000 0x10000000>;
qcom,iommu-dma = "fastmap";
dma-coherent;
@@ -343,7 +350,7 @@
qcom,static-gpii-mask = <0x1>;
qcom,gpii-mask = <0x3e>;
qcom,ev-factor = <2>;
qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
memory-region = <&qup_iommu_region>;
dma-coherent;
qcom,gpi-ee-offset = <0x10000>;
status = "ok";
@@ -359,7 +366,7 @@
clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
iommus = <&apps_smmu 0x403 0x0>;
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
memory-region = <&qup_iommu_region>;
qcom,iommu-geometry = <0x40000000 0x10000000>;
qcom,iommu-dma = "fastmap";
dma-coherent;