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Change-Id: I18276374d0982f7c6d75adafbb93b2d6de8a3532
This commit is contained in:
Linux Build Service Account
2025-02-26 06:34:55 -08:00
parent 2957ae5750 a7b3572ba8
commit b1c69a388b
13 changed files with 186 additions and 129 deletions
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11
bindings/pwm/qcom,pwm-qti-lpg.yaml
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@@ -88,12 +88,13 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32-array $ref: /schemas/types.yaml#/definitions/uint32-array
maxItems: 64 maxItems: 64
qcom,force-low-pwm-size: qcom,mid-res-support:
description: | description: |
The flag to indicate the forced use of legacy low PWM sizes The flag to indicate support for medium resolution pwm
(6 or 9 bits) instead of full 8-15 bit PWM sizes, when the for PMICs where the subtype detects high resolution, but
PWM size is calculated based on the requested PWM period by the high resolution clock source 76.8Mz is not supported.
the client driver. This flag will ensure removal of 76.8MHz clock support and
usage of the other 3 clock sources.
type: boolean type: boolean
required: required:

5
qcom/kera-iot-cdp-qca6750-ufs4-overlay.dts
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@@ -1,12 +1,13 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
/dts-v1/; /dts-v1/;
/plugin/; /plugin/;
#include "kera-cdp-qca6750-ufs4-overlay.dts" #include "kera-iot-cdp-qca6750-ufs4.dtsi"
#include "kera-pmiv0102.dtsi"
/ { / {
model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS4 for IoT"; model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS4 for IoT";

5
qcom/kera-iot-cdp-qca6750-ufs4.dtsi
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@@ -1,9 +1,10 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include "kera-cdp-qca6750-ufs4.dtsi" #include "kera-cdp.dtsi"
#include "kera_ufs4.dtsi"
&gcc { &gcc {
/delete-property/ protected-clocks; /delete-property/ protected-clocks;

21
qcom/kera-oemvm.dtsi
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -40,14 +40,23 @@
}; };
idle-states { idle-states {
CPU_PWR_DWN: c4 { /* Using Medium C4 latencies */ CPU_PWR_DWN: c4 { /* Using Gold C4 latencies */
compatible = "arm,idle-state"; compatible = "arm,idle-state";
status = "disabled"; idle-state-name = "rail-pc";
entry-latency-us = <550>;
exit-latency-us = <1050>;
min-residency-us = <7951>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
}; };
CLUSTER_PWR_DWN: d4 { /* C4+D4 */
CLUSTER_PWR_DWN: ss3 { /* C4+CL5+SS3 */
compatible = "arm,idle-state"; compatible = "arm,idle-state";
status = "disabled"; idle-state-name = "l3-pc";
entry-latency-us = <750>;
exit-latency-us = <2350>;
min-residency-us = <9144>;
arm,psci-suspend-param = <0x40000044>;
local-timer-stop;
}; };
}; };

198
qcom/kera-thermal.dtsi
View File

@@ -328,85 +328,6 @@
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&tsens0 3>; thermal-sensors = <&tsens0 3>;
trips {
trip-point0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
trip-point1 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
cpu2_emerg0: cpu2-emerg0-cfg {
temperature = <110000>;
hysteresis = <10000>;
type = "passive";
};
trip-point2 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
cooling-maps {
cpu100_cdev {
trip = <&cpu2_emerg0>;
cooling-device = <&cpu2_pause 1 1>;
};
};
};
cpu-1-0-1 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tsens0 4>;
trips {
trip-point0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
trip-point1 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
cpu2_emerg1: cpu2-emerg1-cfg {
temperature = <110000>;
hysteresis = <10000>;
type = "passive";
};
trip-point2 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
cooling-maps {
cpu101_cdev {
trip = <&cpu2_emerg1>;
cooling-device = <&cpu2_pause 1 1>;
};
};
};
cpu-1-1-0 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tsens0 5>;
trips { trips {
trip-point0 { trip-point0 {
temperature = <125000>; temperature = <125000>;
@@ -434,17 +355,17 @@
}; };
cooling-maps { cooling-maps {
cpu110_cdev { cpu100_cdev {
trip = <&cpu3_emerg0>; trip = <&cpu3_emerg0>;
cooling-device = <&cpu3_pause 1 1>; cooling-device = <&cpu3_pause 1 1>;
}; };
}; };
}; };
cpu-1-1-1 { cpu-1-0-1 {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&tsens0 6>; thermal-sensors = <&tsens0 4>;
trips { trips {
trip-point0 { trip-point0 {
@@ -473,17 +394,18 @@
}; };
cooling-maps { cooling-maps {
cpu111_cdev { cpu101_cdev {
trip = <&cpu3_emerg1>; trip = <&cpu3_emerg1>;
cooling-device = <&cpu3_pause 1 1>; cooling-device = <&cpu3_pause 1 1>;
}; };
}; };
}; };
cpu-1-2-0 {
cpu-1-1-0 {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&tsens0 7>; thermal-sensors = <&tsens0 5>;
trips { trips {
trip-point0 { trip-point0 {
@@ -512,17 +434,17 @@
}; };
cooling-maps { cooling-maps {
cpu120_cdev { cpu110_cdev {
trip = <&cpu4_emerg0>; trip = <&cpu4_emerg0>;
cooling-device = <&cpu4_pause 1 1>; cooling-device = <&cpu4_pause 1 1>;
}; };
}; };
}; };
cpu-1-2-1 { cpu-1-1-1 {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&tsens0 8>; thermal-sensors = <&tsens0 6>;
trips { trips {
trip-point0 { trip-point0 {
@@ -551,17 +473,17 @@
}; };
cooling-maps { cooling-maps {
cpu121_cdev { cpu111_cdev {
trip = <&cpu4_emerg1>; trip = <&cpu4_emerg1>;
cooling-device = <&cpu4_pause 1 1>; cooling-device = <&cpu4_pause 1 1>;
}; };
}; };
}; };
cpu-1-3-0 { cpu-1-2-0 {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&tsens0 9>; thermal-sensors = <&tsens0 7>;
trips { trips {
trip-point0 { trip-point0 {
@@ -582,7 +504,7 @@
type = "passive"; type = "passive";
}; };
trip-point4 { trip-point2 {
temperature = <115000>; temperature = <115000>;
hysteresis = <0>; hysteresis = <0>;
type = "hot"; type = "hot";
@@ -590,17 +512,17 @@
}; };
cooling-maps { cooling-maps {
cpu130_cdev { cpu120_cdev {
trip = <&cpu5_emerg0>; trip = <&cpu5_emerg0>;
cooling-device = <&cpu5_pause 1 1>; cooling-device = <&cpu5_pause 1 1>;
}; };
}; };
}; };
cpu-1-3-1 { cpu-1-2-1 {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&tsens0 10>; thermal-sensors = <&tsens0 8>;
trips { trips {
trip-point0 { trip-point0 {
@@ -629,13 +551,91 @@
}; };
cooling-maps { cooling-maps {
cpu131_cdev { cpu121_cdev {
trip = <&cpu5_emerg1>; trip = <&cpu5_emerg1>;
cooling-device = <&cpu5_pause 1 1>; cooling-device = <&cpu5_pause 1 1>;
}; };
}; };
}; };
cpu-1-3-0 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tsens0 9>;
trips {
trip-point0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
trip-point1 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
cpu6_emerg0: cpu6-emerg0-cfg {
temperature = <110000>;
hysteresis = <10000>;
type = "passive";
};
trip-point4 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
cooling-maps {
cpu130_cdev {
trip = <&cpu6_emerg0>;
cooling-device = <&cpu6_pause 1 1>;
};
};
};
cpu-1-3-1 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tsens0 10>;
trips {
trip-point0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
trip-point1 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
cpu6_emerg1: cpu6-emerg1-cfg {
temperature = <110000>;
hysteresis = <10000>;
type = "passive";
};
trip-point2 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
cooling-maps {
cpu131_cdev {
trip = <&cpu6_emerg1>;
cooling-device = <&cpu6_pause 1 1>;
};
};
};
cpu-2-0-0 { cpu-2-0-0 {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
@@ -830,7 +830,7 @@
type = "passive"; type = "passive";
}; };
cpu6_emerg0: cpu6-emerg0-cfg { cpu2_emerg0: cpu2-emerg0-cfg {
temperature = <110000>; temperature = <110000>;
hysteresis = <10000>; hysteresis = <10000>;
type = "passive"; type = "passive";
@@ -845,8 +845,8 @@
cooling-maps { cooling-maps {
cpu140_cdev { cpu140_cdev {
trip = <&cpu6_emerg0>; trip = <&cpu2_emerg0>;
cooling-device = <&cpu6_pause 1 1>; cooling-device = <&cpu2_pause 1 1>;
}; };
}; };
}; };

25
qcom/kera-vm-qrd-wcn7750.dtsi
View File

@@ -1,7 +1,30 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
&soc { &soc {
}; };
&qupv3_se8_spi {
status = "ok";
goodix-berlin@0 {
compatible = "goodix,gt9916S";
reg = <0>;
spi-max-frequency = <1000000>;
goodix,panel-max-x = <1080>;
goodix,panel-max-y = <2400>;
goodix,panel-max-w = <255>;
goodix,panel-max-p = <4096>;
goodix,touch-type = "primary";
goodix,qts_en;
qts,trusted-touch-mode = "vm_mode";
qts,touch-environment = "tvm";
qts,trusted-touch-type = "primary";
qts,trusted-touch-spi-irq = <653>;
qts,trusted-touch-io-bases = <0x880000>;
qts,trusted-touch-io-sizes = <0x1000>;
qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0
&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
};
};

21
qcom/kera-vm.dtsi
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -42,14 +42,23 @@
}; };
idle-states { idle-states {
CPU_PWR_DWN: c4 { /* Using Medium C4 latencies */ CPU_PWR_DWN: c4 { /* Using Gold C4 latencies */
compatible = "arm,idle-state"; compatible = "arm,idle-state";
status = "disabled"; idle-state-name = "rail-pc";
entry-latency-us = <550>;
exit-latency-us = <1050>;
min-residency-us = <7951>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
}; };
CLUSTER_PWR_DWN: d4 { /* C4+D4 */
CLUSTER_PWR_DWN: ss3 { /* C4+CL5+SS3 */
compatible = "arm,idle-state"; compatible = "arm,idle-state";
status = "disabled"; idle-state-name = "l3-pc";
entry-latency-us = <750>;
exit-latency-us = <2350>;
min-residency-us = <9144>;
arm,psci-suspend-param = <0x40000044>;
local-timer-stop;
}; };
}; };

5
qcom/kera.dtsi
View File

@@ -507,6 +507,11 @@
}; };
}; };
show_resume_irqs@17100000 {
compatible = "qcom,show-resume-irqs";
reg = <0x17100000 0x290000>; /* GICD */
};
intc: interrupt-controller@17100000 { intc: interrupt-controller@17100000 {
compatible = "arm,gic-v3"; compatible = "arm,gic-v3";
#interrupt-cells = <3>; #interrupt-cells = <3>;

6
qcom/monaco-coresight.dtsi
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
&soc { &soc {
@@ -175,7 +175,7 @@
compatible = "arm,coresight-dummy-source"; compatible = "arm,coresight-dummy-source";
coresight-name = "coresight-snoc"; coresight-name = "coresight-snoc";
atid = <125>; atid = <18>;
out-ports { out-ports {
port { port {
@@ -468,7 +468,7 @@
tpdm_wcss: tpdm@899c000 { tpdm_wcss: tpdm@899c000 {
compatible = "arm,coresight-dummy-source"; compatible = "arm,coresight-dummy-source";
coresight-name = "coresight-tpdm-wcss"; coresight-name = "coresight-tpdm-wcss";
atid = <67>; atid = <24>;
out-ports { out-ports {
port { port {

2
qcom/parrot-idp.dtsi
View File

@@ -31,7 +31,7 @@
&pm6450_pwm_1 { &pm6450_pwm_1 {
status = "ok"; status = "ok";
qcom,force-low-pwm-size; qcom,mid-res-support;
}; };
&qupv3_se9_i2c { &qupv3_se9_i2c {

2
qcom/ravelin-pmic-overlay.dtsi
View File

@@ -633,7 +633,7 @@
&pm6450_pwm_1 { &pm6450_pwm_1 {
status = "ok"; status = "ok";
qcom,force-low-pwm-size; qcom,mid-res-support;
}; };
&pm6450_gpios { &pm6450_gpios {

9
qcom/sdxkova.dtsi
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,ipcc.h>
@@ -181,6 +181,11 @@
}; };
}; };
show_resume_irqs@17200000 {
compatible = "qcom,show-resume-irqs";
reg = <0x0 0x17200000 0x0 0xf0000>; /* GICD */
};
/delete-node/ rsc@17a00000; /delete-node/ rsc@17a00000;
apps_rsc: rsc@17a00000 { apps_rsc: rsc@17a00000 {
@@ -347,8 +352,6 @@
}; };
&tlmm { &tlmm {
/delete-property/ wakeup-parent;
/* TO DO: re-enable PDC dependency once we validate PDC changes */
gpio-reserved-ranges = <110 6>; gpio-reserved-ranges = <110 6>;
sdc1_emmc_on: sdc1_emmc_on { sdc1_emmc_on: sdc1_emmc_on {
clk { clk {

5
qcom/tuna.dtsi
View File

@@ -554,6 +554,11 @@
msm_gpu: qcom,kgsl-3d0@3d00000 { }; msm_gpu: qcom,kgsl-3d0@3d00000 { };
show_resume_irqs@17100000 {
compatible = "qcom,show-resume-irqs";
reg = <0x17100000 0x290000>; /* GICD */
};
intc: interrupt-controller@17100000 { intc: interrupt-controller@17100000 {
compatible = "arm,gic-v3"; compatible = "arm,gic-v3";
#interrupt-cells = <3>; #interrupt-cells = <3>;