From fdda8d4d4b626c270ea7d528e06d84f87b9b8a56 Mon Sep 17 00:00:00 2001 From: Shilpa Suresh Date: Thu, 5 Dec 2024 21:56:51 +0530 Subject: [PATCH 01/15] ARM: dts: msm: Replace force-low-pwm-size with mid-res-support Remove the force-low-pwm-size property and add the mid-res-support property. PM6450 does not have support for 76.8Mhz clock source, but PM6450 has the same subtype which detects high resolution support. Add medium resolution support which removes 76.8Mhz support and uses the other 3 clock sources for its usage. Change-Id: I37a52126ff2d7538bca1cd036c83d7e78391acd3 Signed-off-by: Shilpa Suresh --- qcom/parrot-idp.dtsi | 2 +- qcom/ravelin-pmic-overlay.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/qcom/parrot-idp.dtsi b/qcom/parrot-idp.dtsi index 6902a3d1..9a3c5067 100644 --- a/qcom/parrot-idp.dtsi +++ b/qcom/parrot-idp.dtsi @@ -31,7 +31,7 @@ &pm6450_pwm_1 { status = "ok"; - qcom,force-low-pwm-size; + qcom,mid-res-support; }; &qupv3_se9_i2c { diff --git a/qcom/ravelin-pmic-overlay.dtsi b/qcom/ravelin-pmic-overlay.dtsi index 21b1b6e8..4ebeeab3 100644 --- a/qcom/ravelin-pmic-overlay.dtsi +++ b/qcom/ravelin-pmic-overlay.dtsi @@ -633,7 +633,7 @@ &pm6450_pwm_1 { status = "ok"; - qcom,force-low-pwm-size; + qcom,mid-res-support; }; &pm6450_gpios { From 3977214ccfd71c39755b1401427a589c588630f8 Mon Sep 17 00:00:00 2001 From: Shilpa Suresh Date: Mon, 23 Dec 2024 14:02:24 +0530 Subject: [PATCH 02/15] dt-bindings: pwm-qti-lpg: Add support for medium resolution PWM Remove the force-low-pwm-size property and add the mid-res-support property. PM6450 does not have support for 76.8Mhz clock source, but PM6450 has the same subtype which detects high resolution support. Add medium resolution support which removes 76.8Mhz support and uses the other 3 clock sources. Change-Id: I8ba5f28c441ddab5321a7ba24b09424c7f31b538 Signed-off-by: Shilpa Suresh --- bindings/pwm/qcom,pwm-qti-lpg.yaml | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/bindings/pwm/qcom,pwm-qti-lpg.yaml b/bindings/pwm/qcom,pwm-qti-lpg.yaml index e7dd30ab..9be67d6a 100644 --- a/bindings/pwm/qcom,pwm-qti-lpg.yaml +++ b/bindings/pwm/qcom,pwm-qti-lpg.yaml @@ -88,12 +88,13 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32-array maxItems: 64 - qcom,force-low-pwm-size: + qcom,mid-res-support: description: | - The flag to indicate the forced use of legacy low PWM sizes - (6 or 9 bits) instead of full 8-15 bit PWM sizes, when the - PWM size is calculated based on the requested PWM period by - the client driver. + The flag to indicate support for medium resolution pwm + for PMICs where the subtype detects high resolution, but + the high resolution clock source 76.8Mz is not supported. + This flag will ensure removal of 76.8MHz clock support and + usage of the other 3 clock sources. type: boolean required: From d5211a259f157f1c0ba4e6ef2f064928964313f9 Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Fri, 10 Jan 2025 16:23:21 +0530 Subject: [PATCH 03/15] ARM: dts: msm: Add PDC as wakeup parent to TLMM for sdxkova Add PDC interrupt controller as wakeup-parent to enable TLMM interrupts to wake up the SoC. Change-Id: I3b75f257153ffbc4cac6d58f2f57bdb70cf07913 Signed-off-by: Sneh Mankad --- qcom/sdxkova.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi index 45e8626f..5404f06d 100644 --- a/qcom/sdxkova.dtsi +++ b/qcom/sdxkova.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -347,8 +347,6 @@ }; &tlmm { - /delete-property/ wakeup-parent; - /* TO DO: re-enable PDC dependency once we validate PDC changes */ gpio-reserved-ranges = <110 6>; sdc1_emmc_on: sdc1_emmc_on { clk { From a04cc4f29b60d074ca98ca64aec1df3fbfc3ed1e Mon Sep 17 00:00:00 2001 From: Rui Chen Date: Thu, 23 Jan 2025 15:44:38 +0800 Subject: [PATCH 04/15] ARM: dts: msm: add trusted touch properties for kera qrd Add trusted touch properties for kera qrd platforms. Change-Id: I6f6c65fcaa5300850c543ebe708b00a005a0a40f Signed-off-by: Rui Chen --- qcom/kera-vm-qrd-wcn7750.dtsi | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/qcom/kera-vm-qrd-wcn7750.dtsi b/qcom/kera-vm-qrd-wcn7750.dtsi index 1510613d..805e6850 100644 --- a/qcom/kera-vm-qrd-wcn7750.dtsi +++ b/qcom/kera-vm-qrd-wcn7750.dtsi @@ -1,7 +1,30 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ &soc { }; + +&qupv3_se8_spi { + status = "ok"; + goodix-berlin@0 { + compatible = "goodix,gt9916S"; + reg = <0>; + spi-max-frequency = <1000000>; + goodix,panel-max-x = <1080>; + goodix,panel-max-y = <2400>; + goodix,panel-max-w = <255>; + goodix,panel-max-p = <4096>; + goodix,touch-type = "primary"; + goodix,qts_en; + qts,trusted-touch-mode = "vm_mode"; + qts,touch-environment = "tvm"; + qts,trusted-touch-type = "primary"; + qts,trusted-touch-spi-irq = <653>; + qts,trusted-touch-io-bases = <0x880000>; + qts,trusted-touch-io-sizes = <0x1000>; + qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0 + &tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>; + }; +}; From df7caa44832295e9f66fb06c6585cbdb54d9c79c Mon Sep 17 00:00:00 2001 From: Manish Pandey Date: Wed, 5 Feb 2025 16:32:24 +0530 Subject: [PATCH 05/15] ARM: dts: qcom: Update ESI affinity mask for tuna Update ESI affinity mask in tuna device tree for UFS performance reasons. Change-Id: Ie06355e2d2604553da0f1e72b6d46032c55cdcf4 Signed-off-by: Manish Pandey --- qcom/tuna.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi index 9bbdd35e..d676cf7f 100644 --- a/qcom/tuna.dtsi +++ b/qcom/tuna.dtsi @@ -2537,7 +2537,7 @@ qcom,prime-mask = <0x80>; qcom,silver-mask = <0x0f>; qcom,cluster-mask = <0x03 0x1c 0x60 0x80>; - qcom,esi-affinity-mask = <5 6 7 7 7 6 6 5>; + qcom,esi-affinity-mask = <6 5 7 7 5 6 5 7>; lanes-per-direction = <2>; clock-names = From e4900f19c297b85cb50e28ff7f789dd2ba9da97b Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Thu, 6 Feb 2025 12:44:33 +0530 Subject: [PATCH 06/15] ARM: dts: msm: Add show-resume-irqs device for tuna Add show-resume-irqs device to show the wakeup irq after system resume. Change-Id: I41b742c4251974580c931b7f3c0530aa7fe04333 Signed-off-by: Sneh Mankad --- qcom/tuna.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi index 359ac6b3..9b2b0d9d 100644 --- a/qcom/tuna.dtsi +++ b/qcom/tuna.dtsi @@ -554,6 +554,11 @@ msm_gpu: qcom,kgsl-3d0@3d00000 { }; + show_resume_irqs@17100000 { + compatible = "qcom,show-resume-irqs"; + reg = <0x17100000 0x290000>; /* GICD */ + }; + intc: interrupt-controller@17100000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; From 2d48e1654d21902f01802c54e5c0fc1b09470c1b Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Thu, 6 Feb 2025 12:46:56 +0530 Subject: [PATCH 07/15] ARM: dts: msm: Add show-resume-irqs device for kera Add device to show wakeup irq during system resume. Change-Id: I1add0f44cd1773b5f61afbfc25f2c70f3323ceda Signed-off-by: Sneh Mankad --- qcom/kera.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 639c6bba..0399aec4 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -507,6 +507,11 @@ }; }; + show_resume_irqs@17100000 { + compatible = "qcom,show-resume-irqs"; + reg = <0x17100000 0x290000>; /* GICD */ + }; + intc: interrupt-controller@17100000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; From b5dcb3d9e22fb17b2578687ddb40ea070725aa99 Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Fri, 24 Jan 2025 11:27:15 +0530 Subject: [PATCH 08/15] ARM: dts: msm: Enable idle states for Kera VM Enable idle states for kera VM to enable VCPUs to enter LPM when no load is running on them. Change-Id: I0e01f36557fedf68a7beb152025ab14b66fff7dc Signed-off-by: Sneh Mankad --- qcom/kera-oemvm.dtsi | 21 +++++++++++++++------ qcom/kera-vm.dtsi | 21 +++++++++++++++------ 2 files changed, 30 insertions(+), 12 deletions(-) diff --git a/qcom/kera-oemvm.dtsi b/qcom/kera-oemvm.dtsi index b72e35f9..49d8a27e 100644 --- a/qcom/kera-oemvm.dtsi +++ b/qcom/kera-oemvm.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -40,14 +40,23 @@ }; idle-states { - CPU_PWR_DWN: c4 { /* Using Medium C4 latencies */ + CPU_PWR_DWN: c4 { /* Using Gold C4 latencies */ compatible = "arm,idle-state"; - status = "disabled"; + idle-state-name = "rail-pc"; + entry-latency-us = <550>; + exit-latency-us = <1050>; + min-residency-us = <7951>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; }; - - CLUSTER_PWR_DWN: ss3 { /* C4+CL5+SS3 */ + CLUSTER_PWR_DWN: d4 { /* C4+D4 */ compatible = "arm,idle-state"; - status = "disabled"; + idle-state-name = "l3-pc"; + entry-latency-us = <750>; + exit-latency-us = <2350>; + min-residency-us = <9144>; + arm,psci-suspend-param = <0x40000044>; + local-timer-stop; }; }; diff --git a/qcom/kera-vm.dtsi b/qcom/kera-vm.dtsi index 92359460..a3461ad0 100644 --- a/qcom/kera-vm.dtsi +++ b/qcom/kera-vm.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -42,14 +42,23 @@ }; idle-states { - CPU_PWR_DWN: c4 { /* Using Medium C4 latencies */ + CPU_PWR_DWN: c4 { /* Using Gold C4 latencies */ compatible = "arm,idle-state"; - status = "disabled"; + idle-state-name = "rail-pc"; + entry-latency-us = <550>; + exit-latency-us = <1050>; + min-residency-us = <7951>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; }; - - CLUSTER_PWR_DWN: ss3 { /* C4+CL5+SS3 */ + CLUSTER_PWR_DWN: d4 { /* C4+D4 */ compatible = "arm,idle-state"; - status = "disabled"; + idle-state-name = "l3-pc"; + entry-latency-us = <750>; + exit-latency-us = <2350>; + min-residency-us = <9144>; + arm,psci-suspend-param = <0x40000044>; + local-timer-stop; }; }; From 08be6230aa685ee074427da9f652c24daa20ba7b Mon Sep 17 00:00:00 2001 From: Manish Pandey Date: Thu, 6 Feb 2025 18:34:48 +0530 Subject: [PATCH 09/15] ARM: dts: msm: Update ESI-affinity CPUs for Kera Update MCQ esi-affinity CPUs for kera to enhance performance. Change-Id: I1f6288b7da2e90d0c40f287bcf51a1eaa3147dfe Signed-off-by: Manish Pandey --- qcom/kera.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index 639c6bba..d05da337 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -2900,7 +2900,7 @@ qcom,prime-mask = <0x80>; qcom,silver-mask = <0x07>; - qcom,esi-affinity-mask = <6 5 5 7 7 7 6 6>; + qcom,esi-affinity-mask = <6 5 4 7 7 6 6 7>; lanes-per-direction = <2>; clock-names = From b11d5022f37f9c09a1306a7a7c3be13f415459da Mon Sep 17 00:00:00 2001 From: Bhasker Reddy Komatireddy Date: Thu, 6 Feb 2025 15:04:16 +0530 Subject: [PATCH 10/15] ARM: dts: qcom: change include files for kera iot dts modify the include files for kera iot dts. Change-Id: Ia3b7d66bc29d9ea68a71eedd2131aa088d773319 Signed-off-by: Bhasker Reddy Komatireddy --- qcom/kera-iot-cdp-qca6750-ufs4-overlay.dts | 5 +++-- qcom/kera-iot-cdp-qca6750-ufs4.dtsi | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/qcom/kera-iot-cdp-qca6750-ufs4-overlay.dts b/qcom/kera-iot-cdp-qca6750-ufs4-overlay.dts index 059ec876..db656781 100644 --- a/qcom/kera-iot-cdp-qca6750-ufs4-overlay.dts +++ b/qcom/kera-iot-cdp-qca6750-ufs4-overlay.dts @@ -1,12 +1,13 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; /plugin/; -#include "kera-cdp-qca6750-ufs4-overlay.dts" +#include "kera-iot-cdp-qca6750-ufs4.dtsi" +#include "kera-pmiv0102.dtsi" / { model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS4 for IoT"; diff --git a/qcom/kera-iot-cdp-qca6750-ufs4.dtsi b/qcom/kera-iot-cdp-qca6750-ufs4.dtsi index 665af693..611380f7 100644 --- a/qcom/kera-iot-cdp-qca6750-ufs4.dtsi +++ b/qcom/kera-iot-cdp-qca6750-ufs4.dtsi @@ -1,9 +1,10 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "kera-cdp-qca6750-ufs4.dtsi" +#include "kera-cdp.dtsi" +#include "kera_ufs4.dtsi" &gcc { /delete-property/ protected-clocks; From 7d02285338e8cc7445691dbb942ada98b71195ea Mon Sep 17 00:00:00 2001 From: Priyansh Jain Date: Mon, 10 Feb 2025 15:39:14 +0530 Subject: [PATCH 11/15] ARM: dts: qcom: Update cpu pause mappings to cpu tsens sensors for tuna Update cpu pause mappings to cpu tsens sensors for tuna. Change-Id: I998e4e916e8f552d2705cd51b1d6053070fc2470 Signed-off-by: Priyansh Jain --- qcom/tuna-thermal.dtsi | 460 ++++++++++++++++++++--------------------- 1 file changed, 230 insertions(+), 230 deletions(-) diff --git a/qcom/tuna-thermal.dtsi b/qcom/tuna-thermal.dtsi index 29406413..5e7eef03 100644 --- a/qcom/tuna-thermal.dtsi +++ b/qcom/tuna-thermal.dtsi @@ -467,13 +467,13 @@ type = "passive"; }; - cpu2_emerg0: cpu2-emerg0-cfg { + cpu5_emerg0: cpu5-emerg0-cfg { temperature = <118000>; hysteresis = <8000>; type = "passive"; }; - cpu2_emerg0_1: cpu2-emerg0-1-cfg { + cpu5_emerg0_1: cpu5-emerg0-1-cfg { temperature = <120000>; hysteresis = <10000>; type = "passive"; @@ -488,13 +488,13 @@ cooling-maps { cpu100_cdev { - trip = <&cpu2_emerg0>; - cooling-device = <&cpu2_pause 1 1>; + trip = <&cpu5_emerg0>; + cooling-device = <&cpu5_pause 1 1>; }; cpu100_cdev1 { - trip = <&cpu2_emerg0_1>; - cooling-device = <&cpu2_hotplug 1 1>; + trip = <&cpu5_emerg0_1>; + cooling-device = <&cpu5_hotplug 1 1>; }; }; }; @@ -517,13 +517,13 @@ type = "passive"; }; - cpu2_emerg1: cpu2-emerg1-cfg { + cpu5_emerg1: cpu5-emerg1-cfg { temperature = <118000>; hysteresis = <8000>; type = "passive"; }; - cpu2_emerg1_1: cpu2-emerg1-1-cfg { + cpu5_emerg1_1: cpu5-emerg1-1-cfg { temperature = <120000>; hysteresis = <10000>; type = "passive"; @@ -538,13 +538,13 @@ cooling-maps { cpu101_cdev { - trip = <&cpu2_emerg1>; - cooling-device = <&cpu2_pause 1 1>; + trip = <&cpu5_emerg1>; + cooling-device = <&cpu5_pause 1 1>; }; cpu101_cdev1 { - trip = <&cpu2_emerg1_1>; - cooling-device = <&cpu2_hotplug 1 1>; + trip = <&cpu5_emerg1_1>; + cooling-device = <&cpu5_hotplug 1 1>; }; }; }; @@ -567,13 +567,13 @@ type = "passive"; }; - cpu3_emerg0: cpu3-emerg0-cfg { + cpu6_emerg0: cpu6-emerg0-cfg { temperature = <118000>; hysteresis = <8000>; type = "passive"; }; - cpu3_emerg0_1: cpu3-emerg0-1-cfg { + cpu6_emerg0_1: cpu6-emerg0-1-cfg { temperature = <120000>; hysteresis = <10000>; type = "passive"; @@ -588,13 +588,13 @@ cooling-maps { cpu110_cdev { - trip = <&cpu3_emerg0>; - cooling-device = <&cpu3_pause 1 1>; + trip = <&cpu6_emerg0>; + cooling-device = <&cpu6_pause 1 1>; }; cpu110_cdev1 { - trip = <&cpu3_emerg0_1>; - cooling-device = <&cpu3_hotplug 1 1>; + trip = <&cpu6_emerg0_1>; + cooling-device = <&cpu6_hotplug 1 1>; }; }; }; @@ -617,13 +617,13 @@ type = "passive"; }; - cpu3_emerg1: cpu3-emerg1-cfg { + cpu6_emerg1: cpu6-emerg1-cfg { temperature = <118000>; hysteresis = <8000>; type = "passive"; }; - cpu3_emerg1_1: cpu3-emerg1-1-cfg { + cpu6_emerg1_1: cpu6-emerg1-1-cfg { temperature = <120000>; hysteresis = <10000>; type = "passive"; @@ -638,13 +638,13 @@ cooling-maps { cpu111_cdev { - trip = <&cpu3_emerg1>; - cooling-device = <&cpu3_pause 1 1>; + trip = <&cpu6_emerg1>; + cooling-device = <&cpu6_pause 1 1>; }; cpu111_cdev1 { - trip = <&cpu3_emerg1_1>; - cooling-device = <&cpu3_hotplug 1 1>; + trip = <&cpu6_emerg1_1>; + cooling-device = <&cpu6_hotplug 1 1>; }; }; }; @@ -714,6 +714,206 @@ polling-delay = <0>; thermal-sensors = <&tsens1 3>; + trips { + trip-point0 { + temperature = <135000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu2_emerg0: cpu2-emerg0-cfg { + temperature = <118000>; + hysteresis = <8000>; + type = "passive"; + }; + + cpu2_emerg0_1: cpu2-emerg0-1-cfg { + temperature = <120000>; + hysteresis = <10000>; + type = "passive"; + }; + + trip-point2 { + temperature = <125000>; + hysteresis = <0>; + type = "hot"; + }; + }; + + cooling-maps { + cpu120_cdev { + trip = <&cpu2_emerg0>; + cooling-device = <&cpu2_pause 1 1>; + }; + + cpu120_cdev1 { + trip = <&cpu2_emerg0_1>; + cooling-device = <&cpu2_hotplug 1 1>; + }; + }; + }; + + cpu-1-2-1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 4>; + + trips { + trip-point0 { + temperature = <135000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu2_emerg1: cpu2-emerg1-cfg { + temperature = <118000>; + hysteresis = <8000>; + type = "passive"; + }; + + cpu2_emerg1_1: cpu2-emerg1-1-cfg { + temperature = <120000>; + hysteresis = <10000>; + type = "passive"; + }; + + trip-point2 { + temperature = <125000>; + hysteresis = <0>; + type = "hot"; + }; + }; + + cooling-maps { + cpu121_cdev { + trip = <&cpu2_emerg1>; + cooling-device = <&cpu2_pause 1 1>; + }; + + cpu121_cdev1 { + trip = <&cpu2_emerg1_1>; + cooling-device = <&cpu2_hotplug 1 1>; + }; + }; + }; + + cpu-1-3-0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 5>; + + trips { + trip-point0 { + temperature = <135000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu3_emerg0: cpu3-emerg0-cfg { + temperature = <118000>; + hysteresis = <8000>; + type = "passive"; + }; + + cpu3_emerg0_1: cpu3-emerg0-1-cfg { + temperature = <120000>; + hysteresis = <10000>; + type = "passive"; + }; + + trip-point4 { + temperature = <125000>; + hysteresis = <0>; + type = "hot"; + }; + }; + + cooling-maps { + cpu130_cdev { + trip = <&cpu3_emerg0>; + cooling-device = <&cpu3_pause 1 1>; + }; + + cpu130_cdev1 { + trip = <&cpu3_emerg0_1>; + cooling-device = <&cpu3_hotplug 1 1>; + }; + }; + }; + + cpu-1-3-1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 6>; + + trips { + trip-point0 { + temperature = <135000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu3_emerg1: cpu3-emerg1-cfg { + temperature = <118000>; + hysteresis = <8000>; + type = "passive"; + }; + + cpu3_emerg1_1: cpu3-emerg1-1-cfg { + temperature = <120000>; + hysteresis = <10000>; + type = "passive"; + }; + + trip-point2 { + temperature = <125000>; + hysteresis = <0>; + type = "hot"; + }; + }; + + cooling-maps { + cpu131_cdev { + trip = <&cpu3_emerg1>; + cooling-device = <&cpu3_pause 1 1>; + }; + + cpu131_cdev1 { + trip = <&cpu3_emerg1_1>; + cooling-device = <&cpu3_hotplug 1 1>; + }; + }; + }; + + cpu-1-4-0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens1 7>; + trips { trip-point0 { temperature = <135000>; @@ -747,22 +947,22 @@ }; cooling-maps { - cpu120_cdev { + cpu140_cdev { trip = <&cpu4_emerg0>; cooling-device = <&cpu4_pause 1 1>; }; - cpu120_cdev1 { + cpu140_cdev1 { trip = <&cpu4_emerg0_1>; cooling-device = <&cpu4_hotplug 1 1>; }; }; }; - cpu-1-2-1 { + cpu-1-4-1 { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&tsens1 4>; + thermal-sensors = <&tsens1 8>; trips { trip-point0 { @@ -797,218 +997,18 @@ }; cooling-maps { - cpu121_cdev { + cpu141_cdev { trip = <&cpu4_emerg1>; cooling-device = <&cpu4_pause 1 1>; }; - cpu121_cdev1 { + cpu141_cdev1 { trip = <&cpu4_emerg1_1>; cooling-device = <&cpu4_hotplug 1 1>; }; }; }; - cpu-1-3-0 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens1 5>; - - trips { - trip-point0 { - temperature = <135000>; - hysteresis = <5000>; - type = "passive"; - }; - - trip-point1 { - temperature = <105000>; - hysteresis = <5000>; - type = "passive"; - }; - - cpu5_emerg0: cpu5-emerg0-cfg { - temperature = <118000>; - hysteresis = <8000>; - type = "passive"; - }; - - cpu5_emerg0_1: cpu5-emerg0-1-cfg { - temperature = <120000>; - hysteresis = <10000>; - type = "passive"; - }; - - trip-point4 { - temperature = <125000>; - hysteresis = <0>; - type = "hot"; - }; - }; - - cooling-maps { - cpu130_cdev { - trip = <&cpu5_emerg0>; - cooling-device = <&cpu5_pause 1 1>; - }; - - cpu130_cdev1 { - trip = <&cpu5_emerg0_1>; - cooling-device = <&cpu5_hotplug 1 1>; - }; - }; - }; - - cpu-1-3-1 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens1 6>; - - trips { - trip-point0 { - temperature = <135000>; - hysteresis = <5000>; - type = "passive"; - }; - - trip-point1 { - temperature = <105000>; - hysteresis = <5000>; - type = "passive"; - }; - - cpu5_emerg1: cpu5-emerg1-cfg { - temperature = <118000>; - hysteresis = <8000>; - type = "passive"; - }; - - cpu5_emerg1_1: cpu5-emerg1-1-cfg { - temperature = <120000>; - hysteresis = <10000>; - type = "passive"; - }; - - trip-point2 { - temperature = <125000>; - hysteresis = <0>; - type = "hot"; - }; - }; - - cooling-maps { - cpu131_cdev { - trip = <&cpu5_emerg1>; - cooling-device = <&cpu5_pause 1 1>; - }; - - cpu131_cdev1 { - trip = <&cpu5_emerg1_1>; - cooling-device = <&cpu5_hotplug 1 1>; - }; - }; - }; - - cpu-1-4-0 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens1 7>; - - trips { - trip-point0 { - temperature = <135000>; - hysteresis = <5000>; - type = "passive"; - }; - - trip-point1 { - temperature = <105000>; - hysteresis = <5000>; - type = "passive"; - }; - - cpu6_emerg0: cpu6-emerg0-cfg { - temperature = <118000>; - hysteresis = <8000>; - type = "passive"; - }; - - cpu6_emerg0_1: cpu6-emerg0-1-cfg { - temperature = <120000>; - hysteresis = <10000>; - type = "passive"; - }; - - trip-point2 { - temperature = <125000>; - hysteresis = <0>; - type = "hot"; - }; - }; - - cooling-maps { - cpu140_cdev { - trip = <&cpu6_emerg0>; - cooling-device = <&cpu6_pause 1 1>; - }; - - cpu140_cdev1 { - trip = <&cpu6_emerg0_1>; - cooling-device = <&cpu6_hotplug 1 1>; - }; - }; - }; - - cpu-1-4-1 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens1 8>; - - trips { - trip-point0 { - temperature = <135000>; - hysteresis = <5000>; - type = "passive"; - }; - - trip-point1 { - temperature = <105000>; - hysteresis = <5000>; - type = "passive"; - }; - - cpu6_emerg1: cpu6-emerg1-cfg { - temperature = <118000>; - hysteresis = <8000>; - type = "passive"; - }; - - cpu6_emerg1_1: cpu6-emerg1-1-cfg { - temperature = <120000>; - hysteresis = <10000>; - type = "passive"; - }; - - trip-point2 { - temperature = <125000>; - hysteresis = <0>; - type = "hot"; - }; - }; - - cooling-maps { - cpu141_cdev { - trip = <&cpu6_emerg1>; - cooling-device = <&cpu6_pause 1 1>; - }; - - cpu141_cdev1 { - trip = <&cpu6_emerg1_1>; - cooling-device = <&cpu6_hotplug 1 1>; - }; - }; - }; - cpu-0-0-0 { polling-delay-passive = <0>; polling-delay = <0>; From 08f767f1f15c1046faa9ad2a300f671e81bd09f6 Mon Sep 17 00:00:00 2001 From: Sneh Mankad Date: Mon, 27 Jan 2025 18:49:43 +0530 Subject: [PATCH 12/15] ARM: dts: qcom: Add show-resume-irqs device for sdxkova Add show-resume-irqs feature to show the irq number that triggered suspend exit. Change-Id: I54c59bdc1ae476ca7a86fd34976744eb3db6dcf9 Signed-off-by: Sneh Mankad --- qcom/sdxkova.dtsi | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi index 45e8626f..0ce3d4cd 100644 --- a/qcom/sdxkova.dtsi +++ b/qcom/sdxkova.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -181,6 +181,11 @@ }; }; + show_resume_irqs@17200000 { + compatible = "qcom,show-resume-irqs"; + reg = <0x0 0x17200000 0x0 0xf0000>; /* GICD */ + }; + /delete-node/ rsc@17a00000; apps_rsc: rsc@17a00000 { From c3ef7b651b80af84773b3bced1e3cdd4f644eec7 Mon Sep 17 00:00:00 2001 From: Priyansh Jain Date: Tue, 11 Feb 2025 17:27:09 +0530 Subject: [PATCH 13/15] ARM: dts: qcom: Update correct cpu sensor to cpu pause mapping for kera Update correct cpu sensor to cpu pause mapping for kera. Change-Id: I56d72cb0042d957b59ecd8c9c7ce01e978982a0a Signed-off-by: Priyansh Jain --- qcom/kera-thermal.dtsi | 198 ++++++++++++++++++++--------------------- 1 file changed, 99 insertions(+), 99 deletions(-) diff --git a/qcom/kera-thermal.dtsi b/qcom/kera-thermal.dtsi index 702adca7..53ec3375 100644 --- a/qcom/kera-thermal.dtsi +++ b/qcom/kera-thermal.dtsi @@ -328,85 +328,6 @@ polling-delay = <0>; thermal-sensors = <&tsens0 3>; - trips { - trip-point0 { - temperature = <125000>; - hysteresis = <1000>; - type = "passive"; - }; - - trip-point1 { - temperature = <125000>; - hysteresis = <1000>; - type = "passive"; - }; - - cpu2_emerg0: cpu2-emerg0-cfg { - temperature = <110000>; - hysteresis = <10000>; - type = "passive"; - }; - - trip-point2 { - temperature = <115000>; - hysteresis = <0>; - type = "hot"; - }; - }; - - cooling-maps { - cpu100_cdev { - trip = <&cpu2_emerg0>; - cooling-device = <&cpu2_pause 1 1>; - }; - }; - }; - - cpu-1-0-1 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens0 4>; - - trips { - trip-point0 { - temperature = <125000>; - hysteresis = <1000>; - type = "passive"; - }; - - trip-point1 { - temperature = <125000>; - hysteresis = <1000>; - type = "passive"; - }; - - cpu2_emerg1: cpu2-emerg1-cfg { - temperature = <110000>; - hysteresis = <10000>; - type = "passive"; - }; - - trip-point2 { - temperature = <115000>; - hysteresis = <0>; - type = "hot"; - }; - }; - - cooling-maps { - cpu101_cdev { - trip = <&cpu2_emerg1>; - cooling-device = <&cpu2_pause 1 1>; - }; - }; - }; - - - cpu-1-1-0 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens0 5>; - trips { trip-point0 { temperature = <125000>; @@ -434,17 +355,17 @@ }; cooling-maps { - cpu110_cdev { + cpu100_cdev { trip = <&cpu3_emerg0>; cooling-device = <&cpu3_pause 1 1>; }; }; }; - cpu-1-1-1 { + cpu-1-0-1 { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&tsens0 6>; + thermal-sensors = <&tsens0 4>; trips { trip-point0 { @@ -473,17 +394,18 @@ }; cooling-maps { - cpu111_cdev { + cpu101_cdev { trip = <&cpu3_emerg1>; cooling-device = <&cpu3_pause 1 1>; }; }; }; - cpu-1-2-0 { + + cpu-1-1-0 { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&tsens0 7>; + thermal-sensors = <&tsens0 5>; trips { trip-point0 { @@ -512,17 +434,17 @@ }; cooling-maps { - cpu120_cdev { + cpu110_cdev { trip = <&cpu4_emerg0>; cooling-device = <&cpu4_pause 1 1>; }; }; }; - cpu-1-2-1 { + cpu-1-1-1 { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&tsens0 8>; + thermal-sensors = <&tsens0 6>; trips { trip-point0 { @@ -551,17 +473,17 @@ }; cooling-maps { - cpu121_cdev { + cpu111_cdev { trip = <&cpu4_emerg1>; cooling-device = <&cpu4_pause 1 1>; }; }; }; - cpu-1-3-0 { + cpu-1-2-0 { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&tsens0 9>; + thermal-sensors = <&tsens0 7>; trips { trip-point0 { @@ -582,7 +504,7 @@ type = "passive"; }; - trip-point4 { + trip-point2 { temperature = <115000>; hysteresis = <0>; type = "hot"; @@ -590,17 +512,17 @@ }; cooling-maps { - cpu130_cdev { + cpu120_cdev { trip = <&cpu5_emerg0>; cooling-device = <&cpu5_pause 1 1>; }; }; }; - cpu-1-3-1 { + cpu-1-2-1 { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&tsens0 10>; + thermal-sensors = <&tsens0 8>; trips { trip-point0 { @@ -629,13 +551,91 @@ }; cooling-maps { - cpu131_cdev { + cpu121_cdev { trip = <&cpu5_emerg1>; cooling-device = <&cpu5_pause 1 1>; }; }; }; + cpu-1-3-0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 9>; + + trips { + trip-point0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + + trip-point1 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + + cpu6_emerg0: cpu6-emerg0-cfg { + temperature = <110000>; + hysteresis = <10000>; + type = "passive"; + }; + + trip-point4 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + }; + + cooling-maps { + cpu130_cdev { + trip = <&cpu6_emerg0>; + cooling-device = <&cpu6_pause 1 1>; + }; + }; + }; + + cpu-1-3-1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens0 10>; + + trips { + trip-point0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + + trip-point1 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + + cpu6_emerg1: cpu6-emerg1-cfg { + temperature = <110000>; + hysteresis = <10000>; + type = "passive"; + }; + + trip-point2 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + }; + + cooling-maps { + cpu131_cdev { + trip = <&cpu6_emerg1>; + cooling-device = <&cpu6_pause 1 1>; + }; + }; + }; + cpu-2-0-0 { polling-delay-passive = <0>; polling-delay = <0>; @@ -830,7 +830,7 @@ type = "passive"; }; - cpu6_emerg0: cpu6-emerg0-cfg { + cpu2_emerg0: cpu2-emerg0-cfg { temperature = <110000>; hysteresis = <10000>; type = "passive"; @@ -845,8 +845,8 @@ cooling-maps { cpu140_cdev { - trip = <&cpu6_emerg0>; - cooling-device = <&cpu6_pause 1 1>; + trip = <&cpu2_emerg0>; + cooling-device = <&cpu2_pause 1 1>; }; }; }; From 067ed2e371581bd0fe154186344d4ea01dde936d Mon Sep 17 00:00:00 2001 From: songchai Date: Mon, 10 Feb 2025 17:07:51 +0800 Subject: [PATCH 14/15] ARM: dts: msm: Reserve 16kb to dcc on TZ for tuna Reserve 16kb to dcc on TZ while HLOS have 16 KB. Change-Id: Ic30e6c0c32d6994e495091b4bddfa07e55c36285 Signed-off-by: songchai --- qcom/tuna-debug.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qcom/tuna-debug.dtsi b/qcom/tuna-debug.dtsi index 3867c38a..9377c517 100644 --- a/qcom/tuna-debug.dtsi +++ b/qcom/tuna-debug.dtsi @@ -20,12 +20,12 @@ dcc: dcc_v2@100ff000 { compatible = "qcom,dcc-v2"; reg = <0x100ff000 0x1000>, - <0x10080000 0x8000>; + <0x10084000 0x4000>; qcom,transaction_timeout = <0>; reg-names = "dcc-base", "dcc-ram-base"; - dcc-ram-offset = <0x0>; + dcc-ram-offset = <0x4000>; link_list_0 { qcom,curr-link-list = <6>; From eed40560ba6c6e581f212cb0c5882d19071cedda Mon Sep 17 00:00:00 2001 From: Xiaoqi Zhuang Date: Wed, 12 Feb 2025 19:57:59 +0800 Subject: [PATCH 15/15] ARM: dts: msm: correct static atid for snoc & tpdm-wcss Correct static atid for snoc & tpdm-wcss. Change-Id: I112643221a99e38ba672b5649d98dbd5b1095e12 Signed-off-by: Xiaoqi Zhuang --- qcom/monaco-coresight.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/qcom/monaco-coresight.dtsi b/qcom/monaco-coresight.dtsi index afb072f1..5b4be367 100644 --- a/qcom/monaco-coresight.dtsi +++ b/qcom/monaco-coresight.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ &soc { @@ -175,7 +175,7 @@ compatible = "arm,coresight-dummy-source"; coresight-name = "coresight-snoc"; - atid = <125>; + atid = <18>; out-ports { port { @@ -468,7 +468,7 @@ tpdm_wcss: tpdm@899c000 { compatible = "arm,coresight-dummy-source"; coresight-name = "coresight-tpdm-wcss"; - atid = <67>; + atid = <24>; out-ports { port {