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Merge "ARM: dts: msm: Add kera dts and dtsi files"

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QCTECMDR Service
2024-08-13 19:19:15 -07:00
committed by Gerrit - the friendly Code Review server
parent 50032b556d 9a258f7e6f
commit ae6eb5e9eb
4 changed files with 305 additions and 0 deletions
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15
kera/kera-dsp-trustedvm.dts Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-dsp-trustedvm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera - TrustedVM";
compatible = "qcom,kera";
qcom,msm-id = <659 0x10000>;
};

37
kera/kera-dsp-trustedvm.dtsi Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
fastrpc_gen_pool_region: fastrpc_gen_pool_region {
iommu-addresses = <&fastrpc_compute_cb1 0x8000 0x11000>;
};
fastrpc_compute_cb1: compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
iommus = <&apps_smmu 0xC0B 0x0>;
memory-region = <&fastrpc_gen_pool_region>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
qrtr-gen-pool = <&fastrpc_compute_cb1>;
frpc-gen-addr-pool = <0x8000 0x9000>;
pd-type = <4>; /* SECURE_STATICPD */
};
qrtr-genpool {
compatible = "qcom,qrtr-genpool";
gen-pool = <&fastrpc_compute_cb1>;
interrupt-parent = <&ipcc_mproc_ns1>;
interrupts = <IPCC_CLIENT_CDSP 0 IRQ_TYPE_EDGE_RISING>,
<IPCC_CLIENT_CDSP 1 IRQ_TYPE_EDGE_RISING>;
mboxes = <&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 0>,
<&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 1>;
};
};

16
kera/kera-dsp.dts Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-dsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera v1 SoC";
compatible = "qcom,kera";
qcom,msm-id = <659 0x10000>;
qcom,board-id = <0 0>;
};

237
kera/kera-dsp.dtsi Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&remoteproc_adsp_glink {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "adsp";
memory-region = <&adsp_mem_heap>;
qcom,vmids = <22 37>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x1003 0x0080>,
<&apps_smmu 0x1043 0x0020>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
pd-type = <1>; /* ROOT_PD */
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x1004 0x0080>,
<&apps_smmu 0x1044 0x0020>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,nsessions = <8>;
dma-coherent;
qcom,iova-best-fit;
pd-type = <3>; /* SENSORS_STATICPD */
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x1005 0x0080>,
<&apps_smmu 0x1045 0x0020>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
pd-type = <2>; /* AUDIO_STATICPD */
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x1006 0x0080>,
<&apps_smmu 0x1046 0x0020>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
pd-type = <5>; /* OIS_STATICPD */
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x1007 0x0040>,
<&apps_smmu 0x1067 0x0000>,
<&apps_smmu 0x1087 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <7>; /* USERPD */
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x1008 0x0080>,
<&apps_smmu 0x1048 0x0020>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <7>; /* USERPD */
};
};
};
&remoteproc_cdsp_glink {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "cdsp";
qcom,fastrpc-gids = <2908>;
qcom,rpc-latency-us = <235>;
qcom,single-core-latency-vote;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x0C01 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
pd-type = <1>; /* ROOT_PD */
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x0C02 0x0000>,
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <7>; /* USERPD */
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x0C03 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <7>; /* USERPD */
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x0C04 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <7>; /* USERPD */
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x0C05 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <9>; /* USER_UNSIGNEDPD_POOL */
alloc-size-range = <0x4000000 0xFFFFFFFF>;
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x0C06 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <9>; /* USER_UNSIGNEDPD_POOL */
alloc-size-range = <0x4000000 0xFFFFFFFF>;
};
compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x0C07 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <9>; /* USER_UNSIGNEDPD_POOL */
alloc-size-range = <0x1000000 0xFFFFFFFF>;
};
compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x0C08 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <9>; /* USER_UNSIGNEDPD_POOL */
alloc-size-range = <0x1000000 0xFFFFFFFF>;
};
compute-cb@9 {
compatible = "qcom,fastrpc-compute-cb";
reg = <9>;
qcom,secure-context-bank;
iommus = <&apps_smmu 0x0C09 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
qcom,nsessions = <3>;
dma-coherent;
qcom,iova-best-fit;
pd-type = <6>; /* CPZ_USERPD */
};
compute-cb@10 {
compatible = "qcom,fastrpc-compute-cb";
reg = <12>;
iommus = <&apps_smmu 0x0C0C 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <9>; /* USER_UNSIGNEDPD_POOL */
alloc-size-range = <0x0 0xFFFFFFFF>;
};
compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <13>;
iommus = <&apps_smmu 0x0C0D 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <9>; /* USER_UNSIGNEDPD_POOL */
alloc-size-range = <0x0 0xFFFFFFFF>;
};
compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
reg = <14>;
iommus = <&apps_smmu 0x0C0E 0x0000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
pd-type = <9>; /* USER_UNSIGNEDPD_POOL */
alloc-size-range = <0x0 0xFFFFFFFF>;
};
};
};