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ARM: dts: msm: Add support for VIDEO and EVA clock controllers on TUNA

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Add support for VIDEO and EVA clock controllers and move corresponding
gdsc's from dummy to real on Tuna platform.

Change-Id: Ib29a0af9979b461879504749cad0aa95a9d47136
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
This commit is contained in:
Anaadi Mishra
2024-05-17 12:22:13 +05:30
parent 9aa2959d73
commit 97ed266326
1 changed files with 36 additions and 8 deletions
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44
qcom/tuna.dtsi
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@@ -542,8 +542,19 @@
}; };
evacc: clock-controller@abf0000 { evacc: clock-controller@abf0000 {
compatible = "qcom,dummycc"; compatible = "qcom,tuna-evacc", "syscon";
clock-output-names = "evacc_clocks"; reg = <0xabf0000 0x10000>;
reg-name = "cc_base";
vdd_mm-supply = <&VDD_MM_LEVEL>;
vdd_mxc-supply = <&VDD_MXC_LEVEL>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>,
<&gcc GCC_EVA_AHB_CLK>;
clock-names = "bi_tcxo",
"bi_tcxo_ao",
"sleep_clk",
"iface";
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
@@ -588,8 +599,19 @@
}; };
videocc: clock-controller@aaf0000 { videocc: clock-controller@aaf0000 {
compatible = "qcom,dummycc"; compatible = "qcom,tuna-videocc", "syscon";
clock-output-names = "videocc_clocks"; reg = <0xaaf0000 0x10000>;
reg-name = "cc_base";
vdd_mm-supply = <&VDD_MM_LEVEL>;
vdd_mxc-supply = <&VDD_MXC_LEVEL>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>,
<&gcc GCC_VIDEO_AHB_CLK>;
clock-names = "bi_tcxo",
"bi_tcxo_ao",
"sleep_clk",
"iface";
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
@@ -639,12 +661,15 @@
}; };
&eva_cc_mvs0_gdsc { &eva_cc_mvs0_gdsc {
compatible = "regulator-fixed"; clocks = <&gcc GCC_EVA_AHB_CLK>;
clock-names = "ahb_clk";
status = "ok"; status = "ok";
}; };
&eva_cc_mvs0c_gdsc { &eva_cc_mvs0c_gdsc {
compatible = "regulator-fixed"; clocks = <&gcc GCC_EVA_AHB_CLK>;
clock-names = "ahb_clk";
parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>;
status = "ok"; status = "ok";
}; };
@@ -695,12 +720,15 @@
}; };
&video_cc_mvs0_gdsc { &video_cc_mvs0_gdsc {
compatible = "regulator-fixed"; clocks = <&gcc GCC_VIDEO_AHB_CLK>;
clock-names = "ahb_clk";
status = "ok"; status = "ok";
}; };
&video_cc_mvs0c_gdsc { &video_cc_mvs0c_gdsc {
compatible = "regulator-fixed"; clocks = <&gcc GCC_VIDEO_AHB_CLK>;
clock-names = "ahb_clk";
parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>;
status = "ok"; status = "ok";
}; };