From 97ed2663261c014b289c3303a8ddf1656152e28d Mon Sep 17 00:00:00 2001 From: Anaadi Mishra Date: Fri, 17 May 2024 12:22:13 +0530 Subject: [PATCH] ARM: dts: msm: Add support for VIDEO and EVA clock controllers on TUNA Add support for VIDEO and EVA clock controllers and move corresponding gdsc's from dummy to real on Tuna platform. Change-Id: Ib29a0af9979b461879504749cad0aa95a9d47136 Signed-off-by: Anaadi Mishra --- qcom/tuna.dtsi | 44 ++++++++++++++++++++++++++++++++++++-------- 1 file changed, 36 insertions(+), 8 deletions(-) diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi index e2d37771..85334931 100644 --- a/qcom/tuna.dtsi +++ b/qcom/tuna.dtsi @@ -542,8 +542,19 @@ }; evacc: clock-controller@abf0000 { - compatible = "qcom,dummycc"; - clock-output-names = "evacc_clocks"; + compatible = "qcom,tuna-evacc", "syscon"; + reg = <0xabf0000 0x10000>; + reg-name = "cc_base"; + vdd_mm-supply = <&VDD_MM_LEVEL>; + vdd_mxc-supply = <&VDD_MXC_LEVEL>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>, + <&gcc GCC_EVA_AHB_CLK>; + clock-names = "bi_tcxo", + "bi_tcxo_ao", + "sleep_clk", + "iface"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -588,8 +599,19 @@ }; videocc: clock-controller@aaf0000 { - compatible = "qcom,dummycc"; - clock-output-names = "videocc_clocks"; + compatible = "qcom,tuna-videocc", "syscon"; + reg = <0xaaf0000 0x10000>; + reg-name = "cc_base"; + vdd_mm-supply = <&VDD_MM_LEVEL>; + vdd_mxc-supply = <&VDD_MXC_LEVEL>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>, + <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "bi_tcxo", + "bi_tcxo_ao", + "sleep_clk", + "iface"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -639,12 +661,15 @@ }; &eva_cc_mvs0_gdsc { - compatible = "regulator-fixed"; + clocks = <&gcc GCC_EVA_AHB_CLK>; + clock-names = "ahb_clk"; status = "ok"; }; &eva_cc_mvs0c_gdsc { - compatible = "regulator-fixed"; + clocks = <&gcc GCC_EVA_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; status = "ok"; }; @@ -695,12 +720,15 @@ }; &video_cc_mvs0_gdsc { - compatible = "regulator-fixed"; + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; status = "ok"; }; &video_cc_mvs0c_gdsc { - compatible = "regulator-fixed"; + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; status = "ok"; };