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ARM: dts: msm: Add SDCC support for tuna

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Add SD Card support for tuna atp, cdp, mtp and qrd platform.

Change-Id: I2450eeb4e3b525b30082495d79a6d896e290a891
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
This commit is contained in:
Manish Pandey
2024-10-04 15:24:19 +05:30
parent 54e77dd206
commit 95a4f259ef
3 changed files with 81 additions and 0 deletions
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27
qcom/tuna-cdp.dtsi
View File

@@ -3,6 +3,9 @@
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/qcom,gcc-sun.h>
&qupv3_se4_i2c { &qupv3_se4_i2c {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@@ -83,3 +86,27 @@
status = "ok"; status = "ok";
}; };
&sdhc_2 {
vdd-supply = <&L13B>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 976310>;
vdd-io-supply = <&L23B>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 5830>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
resets = <&gcc GCC_SDCC2_BCR>;
reset-names = "core_reset";
qcom,uses_level_shifter;
status = "ok";
};

28
qcom/tuna-mtp.dtsi
View File

@@ -2,6 +2,10 @@
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/qcom,gcc-sun.h>
&qupv3_se4_i2c { &qupv3_se4_i2c {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@@ -82,3 +86,27 @@
status = "ok"; status = "ok";
}; };
&sdhc_2 {
vdd-supply = <&L13B>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 976310>;
vdd-io-supply = <&L23B>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 5830>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
resets = <&gcc GCC_SDCC2_BCR>;
reset-names = "core_reset";
qcom,uses_level_shifter;
status = "ok";
};

26
qcom/tuna-qrd.dtsi
View File

@@ -2,6 +2,8 @@
/* /*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/qcom,gcc-sun.h>
&qupv3_se4_spi { &qupv3_se4_spi {
#address-cells = <1>; #address-cells = <1>;
@@ -86,3 +88,27 @@
status = "ok"; status = "ok";
}; };
&sdhc_2 {
vdd-supply = <&L13B>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 976310>;
vdd-io-supply = <&L23B>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 5830>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
resets = <&gcc GCC_SDCC2_BCR>;
reset-names = "core_reset";
qcom,uses_level_shifter;
status = "ok";
};