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arm64: dts: qcom: monaco: Remove coherent property for monaco

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Remove coherent proeprty for fastrpc smmu context banks in
monaco target. Monaco target doesn't support IO coherency hence
coherent property is not applicable for monaco.

Change-Id: I9d1f46825b264c48dc519cf6be3cb1edb6241d70
Signed-off-by: Abhinav Parihar <quic_parihar@quicinc.com>
This commit is contained in:
Abhinav Parihar
2024-07-09 14:24:33 +05:30
parent 5ccc2af5ed
commit 8a8c40f33a
1 changed files with 0 additions and 5 deletions
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5
monaco/monaco-dsp.dtsi
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@@ -17,7 +17,6 @@
iommus = <&apps_smmu 0x01C3 0x0>; iommus = <&apps_smmu 0x01C3 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable"; qcom,iommu-faults = "stall-disable";
dma-coherent;
pd-type = <1>; /* ROOT_PD */ pd-type = <1>; /* ROOT_PD */
}; };
@@ -28,7 +27,6 @@
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable"; qcom,iommu-faults = "stall-disable";
qcom,nsessions = <5>; qcom,nsessions = <5>;
dma-coherent;
pd-type = <3>; /* SENSORS_STATICPD */ pd-type = <3>; /* SENSORS_STATICPD */
}; };
@@ -38,7 +36,6 @@
iommus = <&apps_smmu 0x01C5 0x0>; iommus = <&apps_smmu 0x01C5 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable"; qcom,iommu-faults = "stall-disable";
dma-coherent;
pd-type = <2>; /* AUDIO_STATICPD */ pd-type = <2>; /* AUDIO_STATICPD */
}; };
@@ -48,7 +45,6 @@
iommus = <&apps_smmu 0x01C6 0x0>; iommus = <&apps_smmu 0x01C6 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable"; qcom,iommu-faults = "stall-disable";
dma-coherent;
pd-type = <7>; /* USERPD */ pd-type = <7>; /* USERPD */
}; };
@@ -58,7 +54,6 @@
iommus = <&apps_smmu 0x01C7 0x0>; iommus = <&apps_smmu 0x01C7 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable"; qcom,iommu-faults = "stall-disable";
dma-coherent;
pd-type = <7>; /* USERPD */ pd-type = <7>; /* USERPD */
}; };
}; };