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Merge "sun: dts: Add FMD support for sun DTS" into bt-kernel.lnx.15.0

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CNSS_WLAN Service
2024-03-23 06:24:00 -07:00
committed by Gerrit - the friendly Code Review server
parent 5831ae02f4 905572ce34
commit 8946442fd9
5 changed files with 90 additions and 45 deletions
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35
sun-kiwi-bt-v8.dtsi
View File

@@ -5,9 +5,10 @@
*/
#include <dt-bindings/interconnect/qcom,sun.h>
#include <dt-bindings/clock/qcom,rpmh.h>
&pm8550ve_f_gpios {
bt_uwb_en: bt_uwb_en {
bt_en: bt_en {
pins = "gpio3";
function = "normal";
input-disable;
@@ -15,6 +16,14 @@
bias-disable;
power-source = <1>;
};
bt_fmd_clk_en: bt_fmd_clk_en {
pins = "gpio6";
function = "normal";
input-enable;
output-disable;
bias-disable;
power-source = <1>;
};
};
&tlmm {
@@ -29,13 +38,19 @@
&soc {
bluetooth: bt_kiwi {
compatible = "qcom,kiwi";
pinctrl-names = "bt_uwb_en", "sw_ctrl";
pinctrl-0 = <&bt_uwb_en>;
nvmem-cells = <&fmd_set>;
nvmem-cell-names = "fmd_set";
clocks = <&rpmhcc RPMH_RF_CLK1>;
clock-names = "bt_rf_clk1";
pinctrl-names = "bt_en", "sw_ctrl", "bt_fmd_clk_en";
pinctrl-0 = <&bt_en>;
pinctrl-1 = <&cnss_bt_sw_ctrl>;
pinctrl-2 = <&bt_fmd_clk_en>;
/* List of GPIOs to be setup for interrupt wakeup capable*/
mpm_wake_set_gpios = <18>;
qcom,wl-reset-gpio = <&tlmm 16 0>; /* WL_EN */
qcom,bt-sw-ctrl-gpio = <&tlmm 18 0>; /* SW_CTRL */
qcom,bt-fmd-clk-gpio = <&pm8550ve_f_gpios 6 0>; /* FMD_CLK_CTRL */
qcom,bt-reset-gpio = <&pm8550ve_f_gpios 3 0>; /* BT_EN */
qcom,qmp = <&aoss_qmp>;
@@ -47,13 +62,13 @@
qcom,bt-vdd-rfa1-supply = <&S7I>; /* BT RFA1.2 LDO */
qcom,bt-vdd-rfa2-supply = <&S3G>; /* BT RFA1.8 LDO */
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1>;
qcom,bt-ant-ldo-config = <1800000 1800000 0 1>;
qcom,bt-vdd-aon-config = <916000 1100000 0 1>;
qcom,bt-vdd-rfaOp8-config = <916000 1100000 0 1>;
qcom,bt-vdd-rfa1-config = <1316000 1340000 0 1>;
qcom,bt-vdd-rfa2-config = <1864000 2000000 0 1>;
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1 1>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1 1>;
qcom,bt-ant-ldo-config = <1800000 1800000 0 1 0>;
qcom,bt-vdd-aon-config = <916000 1100000 0 1 0>;
qcom,bt-vdd-rfaOp8-config = <916000 1100000 0 1 0>;
qcom,bt-vdd-rfa1-config = <1316000 1340000 0 1 0>;
qcom,bt-vdd-rfa2-config = <1864000 2000000 0 1 0>;
qcom,pdc_init_table =
"{class: wlan_pdc, ss: rf, res: s3g.v, upval: 1856}",

14
sun-kiwi-bt.dtsi
View File

@@ -47,13 +47,13 @@
qcom,bt-vdd-rfa1-supply = <&S7I>; /* BT RFA1.2 LDO */
qcom,bt-vdd-rfa2-supply = <&S3G>; /* BT RFA1.8 LDO */
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1>;
qcom,bt-ant-ldo-config = <1800000 1800000 0 1>;
qcom,bt-vdd-aon-config = <916000 1100000 0 1>;
qcom,bt-vdd-rfaOp8-config = <916000 1100000 0 1>;
qcom,bt-vdd-rfa1-config = <1316000 1340000 0 1>;
qcom,bt-vdd-rfa2-config = <1864000 2000000 0 1>;
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1 0>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1 0>;
qcom,bt-ant-ldo-config = <1800000 1800000 0 1 0>;
qcom,bt-vdd-aon-config = <916000 1100000 0 1 0>;
qcom,bt-vdd-rfaOp8-config = <916000 1100000 0 1 0>;
qcom,bt-vdd-rfa1-config = <1316000 1340000 0 1 0>;
qcom,bt-vdd-rfa2-config = <1864000 2000000 0 1 0>;
qcom,pdc_init_table =
"{class: wlan_pdc, ss: rf, res: s3g.v, upval: 1856}",

35
sun-peach-bt-v8.dtsi
View File

@@ -5,6 +5,7 @@
*/
#include <dt-bindings/interconnect/qcom,sun.h>
#include <dt-bindings/clock/qcom,rpmh.h>
&pm8550ve_f_gpios {
bt_uwb_en: bt_uwb_en {
@@ -15,6 +16,14 @@
bias-disable;
power-source = <1>;
};
bt_fmd_clk_en: bt_fmd_clk_en {
pins = "gpio6";
function = "normal";
input-enable;
output-disable;
bias-disable;
power-source = <1>;
};
};
&tlmm {
@@ -29,14 +38,20 @@
&soc {
bluetooth: bt_peach {
compatible = "qcom,peach-bt";
nvmem-cells = <&fmd_set>;
nvmem-cell-names = "fmd_set";
clocks = <&rpmhcc RPMH_RF_CLK1>;
clock-names = "bt_rf_clk1";
qcom,peach-bt;
pinctrl-names = "bt_uwb_en", "sw_ctrl";
pinctrl-names = "bt_uwb_en", "sw_ctrl", "bt_fmd_clk_en";
pinctrl-0 = <&bt_uwb_en>;
pinctrl-1 = <&cnss_bt_sw_ctrl>;
pinctrl-2 = <&bt_fmd_clk_en>;
/* List of GPIOs to be setup for interrupt wakeup capable*/
mpm_wake_set_gpios = <18>;
mpm_wake_set_gpios = <18 9>;
qcom,wl-reset-gpio = <&tlmm 16 0>; /* WL_EN */
qcom,bt-sw-ctrl-gpio = <&tlmm 18 0>; /* SW_CTRL */
qcom,bt-fmd-clk-gpio = <&pm8550ve_f_gpios 6 0>; /* FMD_CLK_CTRL */
qcom,bt-reset-gpio = <&pm8550ve_f_gpios 3 0>; /* BT_EN */
qcom,qmp = <&aoss_qmp>;
@@ -49,14 +64,14 @@
qcom,bt-vdd-rfa1p8-supply = <&S3G>; /* RFA_1P8 */
qcom,bt-vdd-rfa1p25-supply = <&S7I>; /* RFA_1P2 */
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1>;
qcom,bt-ant-ldo-config = <1800000 1860000 0 1>;
qcom,bt-vdd-aon-config = <876000 1000000 0 1>;
qcom,bt-vdd-dig-config = <876000 1000000 0 1>;
qcom,bt-vdd-rfa0p75-config = <876000 1000000 0 1>;
qcom,bt-vdd-rfa1p8-config = <1860000 2000000 0 1>;
qcom,bt-vdd-rfa1p25-config = <1312000 1340000 0 1>;
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1 1>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1 1>;
qcom,bt-ant-ldo-config = <1800000 1860000 0 1 0>;
qcom,bt-vdd-aon-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-dig-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-rfa0p75-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-rfa1p8-config = <1860000 2000000 0 1 0>;
qcom,bt-vdd-rfa1p25-config = <1312000 1340000 0 1 0>;
qcom,pdc_init_table =
"{class: wlan_pdc, ss: rf, res: s5f.m, enable: 1}",

16
sun-peach-bt.dtsi
View File

@@ -49,14 +49,14 @@
qcom,bt-vdd-rfa1p8-supply = <&S3G>; /* RFA_1P8 */
qcom,bt-vdd-rfa1p25-supply = <&S7I>; /* RFA_1P2 */
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1>;
qcom,bt-ant-ldo-config = <1800000 1860000 0 1>;
qcom,bt-vdd-aon-config = <876000 1000000 0 1>;
qcom,bt-vdd-dig-config = <876000 1000000 0 1>;
qcom,bt-vdd-rfa0p75-config = <876000 1000000 0 1>;
qcom,bt-vdd-rfa1p8-config = <1860000 2000000 0 1>;
qcom,bt-vdd-rfa1p25-config = <1312000 1340000 0 1>;
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1 0>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1 0>;
qcom,bt-ant-ldo-config = <1800000 1860000 0 1 0>;
qcom,bt-vdd-aon-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-dig-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-rfa0p75-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-rfa1p8-config = <1860000 2000000 0 1 0>;
qcom,bt-vdd-rfa1p25-config = <1312000 1340000 0 1 0>;
qcom,pdc_init_table =
"{class: wlan_pdc, ss: rf, res: s4j.m, enable: 1}",

35
sun-wcn788x-v8.dtsi
View File

@@ -5,6 +5,7 @@
*/
#include <dt-bindings/interconnect/qcom,sun.h>
#include <dt-bindings/clock/qcom,rpmh.h>
&pm8550ve_f_gpios {
bt_en: bt_en {
@@ -15,6 +16,14 @@
bias-disable;
power-source = <1>;
};
bt_fmd_clk_en: bt_fmd_clk_en {
pins = "gpio6";
function = "normal";
input-enable;
output-disable;
bias-disable;
power-source = <1>;
};
};
&tlmm {
@@ -29,14 +38,20 @@
&soc {
bluetooth: wcn788x {
compatible = "qcom,wcn788x";
nvmem-cells = <&fmd_set>;
nvmem-cell-names = "fmd_set";
clocks = <&rpmhcc RPMH_RF_CLK1>;
clock-names = "bt_rf_clk1";
qcom,wcn788x;
pinctrl-names = "bt_en", "sw_ctrl";
pinctrl-names = "bt_en", "sw_ctrl", "bt_fmd_clk_en";
pinctrl-0 = <&bt_en>;
pinctrl-1 = <&cnss_bt_sw_ctrl>;
pinctrl-2 = <&bt_fmd_clk_en>;
/* List of GPIOs to be setup for interrupt wakeup capable*/
mpm_wake_set_gpios = <18>;
mpm_wake_set_gpios = <18 9>;
qcom,wl-reset-gpio = <&tlmm 16 0>; /* WL_EN */
qcom,bt-sw-ctrl-gpio = <&tlmm 18 0>; /* SW_CTRL */
qcom,bt-fmd-clk-gpio = <&pm8550ve_f_gpios 6 0>; /* FMD_CLK_CTRL */
qcom,bt-reset-gpio = <&pm8550ve_f_gpios 3 0>; /* BT_EN */
qcom,qmp = <&aoss_qmp>;
@@ -49,14 +64,14 @@
qcom,bt-vdd-rfa1p8-supply = <&S3G>; /* RFA_1P8 */
qcom,bt-vdd-rfa1p25-supply = <&S7I>; /* RFA_1P2 */
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1>;
qcom,bt-ant-ldo-config = <1800000 1860000 0 1>;
qcom,bt-vdd-aon-config = <876000 1000000 0 1>;
qcom,bt-vdd-dig-config = <876000 1000000 0 1>;
qcom,bt-vdd-rfa0p75-config = <876000 1000000 0 1>;
qcom,bt-vdd-rfa1p8-config = <1860000 2000000 0 1>;
qcom,bt-vdd-rfa1p25-config = <1312000 1340000 0 1>;
qcom,bt-vdd18-aon-config = <1800000 1800000 0 1 1>;
qcom,bt-vdd12-io-config = <1200000 1200000 0 1 1>;
qcom,bt-ant-ldo-config = <1800000 1860000 0 1 0>;
qcom,bt-vdd-aon-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-dig-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-rfa0p75-config = <876000 1000000 0 1 0>;
qcom,bt-vdd-rfa1p8-config = <1860000 2000000 0 1 0>;
qcom,bt-vdd-rfa1p25-config = <1312000 1340000 0 1 0>;
qcom,pdc_init_table =
"{class: wlan_pdc, ss: rf, res: s5f.m, enable: 1}",