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ARM: dts: msm: Update gpucc and gx_clkctl clock node as GenPD provider

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Mark gpucc clock node as GenPD provider and disable the
graphics GDSC regulator nodes. Update gxclkctl
node to add support for gx_clkctl_gx_gdsc power domain.

While at it, keep the gdsc regulator nodes as it is on rumi platform.

Change-Id: If205c2116841ff3a11ebce4e06ca3067c4a8721b
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
This commit is contained in:
Anaadi Mishra
2024-08-21 10:28:31 +05:30
parent 195658105f
commit 86ee38dfc0
2 changed files with 15 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
qcom/tuna-rumi.dtsi
View File

@@ -212,3 +212,11 @@
&video_cc_mvs0c_gdsc { &video_cc_mvs0c_gdsc {
status = "ok"; status = "ok";
}; };
&gpu_cc_cx_gdsc {
status = "ok";
};
&gx_clkctl_gx_gdsc {
status = "ok";
};

13
qcom/tuna.dtsi
View File

@@ -1605,13 +1605,16 @@
"gpll0_out_main_div"; "gpll0_out_main_div";
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
#power-domain-cells = <1>;
}; };
gxclkctl: clock-controller@3d68024 { gxclkctl: clock-controller@3d68024 {
compatible = "qcom,dummycc"; compatible = "qcom,tuna-gx_clkctl";
clock-output-names = "gxclkctl_clocks"; reg = <0x3d68024 0x8>;
#clock-cells = <1>; reg-name = "cc_base";
#reset-cells = <1>; power-domains = <&gpucc GPU_CC_CX_GDSC>;
vdd_gx-supply = <&VDD_GFX_MXC_VOTER_LEVEL>;
#power-domain-cells = <1>;
}; };
tcsrcc: clock-controller@1fbf000 { tcsrcc: clock-controller@1fbf000 {
@@ -2632,12 +2635,10 @@
&gpu_cc_cx_gdsc { &gpu_cc_cx_gdsc {
clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; clocks = <&gcc GCC_GPU_CFG_AHB_CLK>;
parent-supply = <&VDD_CX_LEVEL>; parent-supply = <&VDD_CX_LEVEL>;
status = "ok";
}; };
&gx_clkctl_gx_gdsc { &gx_clkctl_gx_gdsc {
parent-supply = <&VDD_GFX_MXC_VOTER_LEVEL>; parent-supply = <&VDD_GFX_MXC_VOTER_LEVEL>;
status = "ok";
}; };
&video_cc_mvs0_gdsc { &video_cc_mvs0_gdsc {