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Merge "ARM: dts: msm: Add LLCC broadacst register mappings on Pineapple"

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qctecmdr
2024-01-16 19:17:17 -08:00
committed by Gerrit - the friendly Code Review server
parent 684564354c e9608835b6
commit 834aff3518
1 changed files with 3 additions and 3 deletions
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qcom/pineapple.dtsi
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@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <dt-bindings/clock/qcom,camcc-pineapple.h> #include <dt-bindings/clock/qcom,camcc-pineapple.h>
@@ -1851,9 +1851,9 @@
compatible = "qcom,pineapple-llcc", "qcom,llcc-v50"; compatible = "qcom,pineapple-llcc", "qcom,llcc-v50";
reg = <0x25000000 0x200000>, <0x25400000 0x200000>, reg = <0x25000000 0x200000>, <0x25400000 0x200000>,
<0x25200000 0x200000>, <0x25600000 0x200000>, <0x25200000 0x200000>, <0x25600000 0x200000>,
<0x25800000 0x200000>; <0x25800000 0x200000>, <0x25a00000 0x200000>;
reg-names = "llcc0_base", "llcc1_base", "llcc2_base", reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
"llcc3_base", "llcc_broadcast_base"; "llcc3_base", "llcc_broadcast_or_base", "llcc_broadcast_and_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
cap-based-alloc-and-pwr-collapse; cap-based-alloc-and-pwr-collapse;