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ARM: dts: qcom: use property “iommu-addresses” for SDC2

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The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
The upstream linux community has added a devicetree property
"iommu-addresses", which describes to the DMA api what IOVA
addresses a device can/cannot use. So we replace “qcom,iommu-
dma-addr-pool” by “iommu-addresses” since kernel 6.5 to follow
upstream.

Change-Id: If18f14d6cb13aa2ed67c1417295fc30723b0c932
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
This commit is contained in:
Ziqi Chen
2024-01-02 17:50:52 +08:00
parent 10d8b6507b
commit 82e81bc907
1 changed files with 10 additions and 1 deletions
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11
qcom/sun.dtsi
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@@ -2437,6 +2437,15 @@
qcom,client-id = <0x00000001>; qcom,client-id = <0x00000001>;
}; };
sdhc_2_dma_resv: sdhc_2_dma_resv_region {
/*
* Restrict IOVA mappings for SDHC2 buffers to the 256 MB region
* from 0x40000000 - 0x4fffffff.
*/
iommu-addresses = <&sdhc_2 0x0 0x40000000>,
<&sdhc_2 0x50000000 0xb0000000>;
};
sdhc_2: sdhci@8804000 { sdhc_2: sdhci@8804000 {
status = "disabled"; status = "disabled";
@@ -2468,7 +2477,7 @@
iommus = <&apps_smmu 0x540 0x0>; iommus = <&apps_smmu 0x540 0x0>;
qcom,iommu-dma = "fastmap"; qcom,iommu-dma = "fastmap";
dma-coherent; dma-coherent;
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>; memory-region = <&sdhc_2_dma_resv>;
qcom,iommu-geometry = <0x40000000 0x10000000>; qcom,iommu-geometry = <0x40000000 0x10000000>;
interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>, interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,