samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge changes I5b210ac3,I16198f67,I04ff258f into kernel.lnx.6.6.r1-rel

Browse Source 
* changes:
  ARM: dts: msm: Update regulator support for tuna
  ARM: dts: msm: Add pcie and display voter devices for KERA
  ARM: dts: msm: Add fps entry for kera
This commit is contained in:
Linux Build Service Account
2025-01-31 22:35:57 -08:00
committed by Gerrit - the friendly Code Review server
parent 98b9f0da64 e3fe7b6fe7
commit 78e3850a96
2 changed files with 131 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

135
qcom/kera.dtsi
View File

@@ -1671,6 +1671,10 @@
reg = <0x0118 0x4>; reg = <0x0118 0x4>;
}; };
feat_conf18: feat_conf18@0148 {
reg = <0x0148 0x4>;
};
gpu_speed_bin: gpu_speed_bin@138 { gpu_speed_bin: gpu_speed_bin@138 {
reg = <0x138 0x2>; reg = <0x138 0x2>;
bits = <0 9>; bits = <0 9>;
@@ -1684,8 +1688,8 @@
qfprom_sys: qfprom@0 { qfprom_sys: qfprom@0 {
compatible = "qcom,qfprom-sys"; compatible = "qcom,qfprom-sys";
nvmem-cells = <&feat_conf6>; nvmem-cells = <&feat_conf6>, <&feat_conf18>;
nvmem-cell-names = "feat_conf6"; nvmem-cell-names = "feat_conf6", "feat_conf18";
}; };
wpss_pas: remoteproc-wpss@97000000 { wpss_pas: remoteproc-wpss@97000000 {
@@ -2013,18 +2017,93 @@
qcom,freq-hw-domain = <&cpufreq_hw 0>, <&cpufreq_hw 1>, <&cpufreq_hw 2>; qcom,freq-hw-domain = <&cpufreq_hw 0>, <&cpufreq_hw 1>, <&cpufreq_hw 2>;
}; };
pcie_crm_hw_0_bcm_voter: bcm_voter@0 {
compatible = "qcom,bcm-voter";
qcom,crm-name = "pcie_crm";
qcom,crm-client-idx = <0>;
qcom,crm-pwr-states = <5>;
};
disp_crm_hw_0_bcm_voter: bcm_voter@1 {
compatible = "qcom,bcm-voter";
qcom,crm-name = "disp_crm";
qcom,crm-client-idx = <0>;
qcom,crm-pwr-states = <2>;
};
disp_crm_hw_1_bcm_voter: bcm_voter@2 {
compatible = "qcom,bcm-voter";
qcom,crm-name = "disp_crm";
qcom,crm-client-idx = <1>;
qcom,crm-pwr-states = <2>;
};
disp_crm_hw_2_bcm_voter: bcm_voter@3 {
compatible = "qcom,bcm-voter";
qcom,crm-name = "disp_crm";
qcom,crm-client-idx = <2>;
qcom,crm-pwr-states = <2>;
};
disp_crm_hw_3_bcm_voter: bcm_voter@4 {
compatible = "qcom,bcm-voter";
qcom,crm-name = "disp_crm";
qcom,crm-client-idx = <3>;
qcom,crm-pwr-states = <2>;
};
disp_crm_hw_4_bcm_voter: bcm_voter@5 {
compatible = "qcom,bcm-voter";
qcom,crm-name = "disp_crm";
qcom,crm-client-idx = <4>;
qcom,crm-pwr-states = <2>;
};
disp_crm_hw_5_bcm_voter: bcm_voter@6 {
compatible = "qcom,bcm-voter";
qcom,crm-name = "disp_crm";
qcom,crm-client-idx = <5>;
qcom,crm-pwr-states = <2>;
};
disp_crm_sw_0_bcm_voter: bcm_voter@7 {
compatible = "qcom,bcm-voter";
qcom,crm-name = "disp_crm";
qcom,crm-sw-client;
qcom,crm-client-idx = <0>;
qcom,crm-pwr-states = <1>;
};
clk_virt: interconnect@0 { clk_virt: interconnect@0 {
compatible = "qcom,kera-clk_virt"; compatible = "qcom,kera-clk_virt";
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos"; qcom,bcm-voter-names = "hlos",
qcom,bcm-voters = <&apps_bcm_voter>; "pcie_crm_hw_0";
qcom,bcm-voters = <&apps_bcm_voter>,
<&pcie_crm_hw_0_bcm_voter>;
}; };
mc_virt: interconnect@1 { mc_virt: interconnect@1 {
compatible = "qcom,kera-mc_virt"; compatible = "qcom,kera-mc_virt";
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos"; qcom,bcm-voter-names = "hlos",
qcom,bcm-voters = <&apps_bcm_voter>; "pcie_crm_hw_0",
"disp_crm_hw_0",
"disp_crm_hw_1",
"disp_crm_hw_2",
"disp_crm_hw_3",
"disp_crm_hw_4",
"disp_crm_hw_5",
"disp_crm_sw_0";
qcom,bcm-voters = <&apps_bcm_voter>,
<&pcie_crm_hw_0_bcm_voter>,
<&disp_crm_hw_0_bcm_voter>,
<&disp_crm_hw_1_bcm_voter>,
<&disp_crm_hw_2_bcm_voter>,
<&disp_crm_hw_3_bcm_voter>,
<&disp_crm_hw_4_bcm_voter>,
<&disp_crm_hw_5_bcm_voter>,
<&disp_crm_sw_0_bcm_voter>;
}; };
config_noc: interconnect@1600000 { config_noc: interconnect@1600000 {
@@ -2055,8 +2134,10 @@
compatible = "qcom,kera-pcie_anoc"; compatible = "qcom,kera-pcie_anoc";
reg = <0x16c0000 0x11400>; reg = <0x16c0000 0x11400>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos"; qcom,bcm-voter-names = "hlos",
qcom,bcm-voters = <&apps_bcm_voter>; "pcie_crm_hw_0";
qcom,bcm-voters = <&apps_bcm_voter>,
<&pcie_crm_hw_0_bcm_voter>;
clocks = <&gcc GCC_AGGRE_NOC_PCIE_AXI_CLK>, clocks = <&gcc GCC_AGGRE_NOC_PCIE_AXI_CLK>,
<&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>; <&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>;
}; };
@@ -2083,16 +2164,46 @@
compatible = "qcom,kera-mmss_noc"; compatible = "qcom,kera-mmss_noc";
reg = <0x1780000 0x7d800>; reg = <0x1780000 0x7d800>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos"; qcom,bcm-voter-names = "hlos",
qcom,bcm-voters = <&apps_bcm_voter>; "disp_crm_hw_0",
"disp_crm_hw_1",
"disp_crm_hw_2",
"disp_crm_hw_3",
"disp_crm_hw_4",
"disp_crm_hw_5",
"disp_crm_sw_0";
qcom,bcm-voters = <&apps_bcm_voter>,
<&disp_crm_hw_0_bcm_voter>,
<&disp_crm_hw_1_bcm_voter>,
<&disp_crm_hw_2_bcm_voter>,
<&disp_crm_hw_3_bcm_voter>,
<&disp_crm_hw_4_bcm_voter>,
<&disp_crm_hw_5_bcm_voter>,
<&disp_crm_sw_0_bcm_voter>;
}; };
gem_noc: interconnect@24100000 { gem_noc: interconnect@24100000 {
compatible = "qcom,kera-gem_noc"; compatible = "qcom,kera-gem_noc";
reg = <0x24100000 0x163080>; reg = <0x24100000 0x163080>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos"; qcom,bcm-voter-names = "hlos",
qcom,bcm-voters = <&apps_bcm_voter>; "pcie_crm_hw_0",
"disp_crm_hw_0",
"disp_crm_hw_1",
"disp_crm_hw_2",
"disp_crm_hw_3",
"disp_crm_hw_4",
"disp_crm_hw_5",
"disp_crm_sw_0";
qcom,bcm-voters = <&apps_bcm_voter>,
<&pcie_crm_hw_0_bcm_voter>,
<&disp_crm_hw_0_bcm_voter>,
<&disp_crm_hw_1_bcm_voter>,
<&disp_crm_hw_2_bcm_voter>,
<&disp_crm_hw_3_bcm_voter>,
<&disp_crm_hw_4_bcm_voter>,
<&disp_crm_hw_5_bcm_voter>,
<&disp_crm_sw_0_bcm_voter>;
}; };
nsp_noc: interconnect@320c0000 { nsp_noc: interconnect@320c0000 {

14
qcom/tuna-regulators.dtsi
View File

@@ -953,9 +953,10 @@
qcom,resource-name = "ldog2"; qcom,resource-name = "ldog2";
qcom,regulator-type = "pmic5-ldo"; qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes = qcom,supported-modes =
<RPMH_REGULATOR_MODE_LPM <RPMH_REGULATOR_MODE_RET
RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>; RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 30000>; qcom,mode-threshold-currents = <0 10000 30000>;
L2G: pm_v6g_l2: vreg-pm_v6g-l2 { L2G: pm_v6g_l2: vreg-pm_v6g-l2 {
regulator-name = "pm_v6g_l2"; regulator-name = "pm_v6g_l2";
@@ -973,9 +974,10 @@
qcom,resource-name = "ldog3"; qcom,resource-name = "ldog3";
qcom,regulator-type = "pmic5-ldo"; qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes = qcom,supported-modes =
<RPMH_REGULATOR_MODE_LPM <RPMH_REGULATOR_MODE_RET
RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>; RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 30000>; qcom,mode-threshold-currents = <0 10000 30000>;
L3G: pm_v6g_l3: vreg-pm_v6g-l3 { L3G: pm_v6g_l3: vreg-pm_v6g-l3 {
regulator-name = "pm_v6g_l3"; regulator-name = "pm_v6g_l3";
@@ -983,7 +985,7 @@
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>; qcom,init-voltage = <1800000>;
qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>; qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
}; };
}; };
@@ -1123,7 +1125,7 @@
regulator-min-microvolt = <1100000>; regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <2000000>; regulator-max-microvolt = <2000000>;
qcom,init-voltage = <1776000>; qcom,init-voltage = <1776000>;
qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>; qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
}; };
}; };