ARM: dts: msm: tuna: Add a node for cpufreq cycle counter driver

Add cpufreq cycle counter register information to devicetree in a
separate node for use by associated driver.

Change-Id: I5c57507acf6d4488402424619ac9d2ad356fb308
Signed-off-by: Ankit Sharma <quic_anshar@quicinc.com>
This commit is contained in:
Ankit Sharma
2024-09-11 16:46:20 +05:30
parent d1c3025fcd
commit 7704cdcbcb
2 changed files with 25 additions and 0 deletions

24
qcom/tuna-walt.dtsi Normal file
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@@ -0,0 +1,24 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
walt {
#address-cells = <1>;
#size-cells = <1>;
ranges;
qcom,cycle-cntr {
compatible = "qcom,epss";
reg = <0x17D91000 0x1000>,
<0x17D92000 0x1000>,
<0x17D93000 0x1000>,
<0x17D94000 0x1000>;
reg-names = "freq-domain0",
"freq-domain1",
"freq-domain2",
"freq-domain3";
};
};
};

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@@ -1657,6 +1657,7 @@
#include "tuna-qupv3.dtsi" #include "tuna-qupv3.dtsi"
#include "msm-rdbg.dtsi" #include "msm-rdbg.dtsi"
#include "tuna-pmic-overlay.dtsi" #include "tuna-pmic-overlay.dtsi"
#include "tuna-walt.dtsi"
&qupv3_se7_2uart { &qupv3_se7_2uart {
status = "ok"; status = "ok";